Searched refs:CDRU_MISC_CLK_ENABLE_CONTROL (Results 1 – 2 of 2) sorted by relevance
140 #define CDRU_MISC_CLK_ENABLE_CONTROL (CDRU_BASE_ADDR + 0x2c8) macro
208 mmio_setbits_32(CDRU_MISC_CLK_ENABLE_CONTROL, in brcm_stingray_sata_init()