| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 93 Opc = Mips::CFC1; in copyPhysReg()
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| D | MipsInstrFPU.td | 364 def CFC1 : MMRel, MFC1_FT<"cfc1", GPR32Opnd, CCROpnd, II_CFC1>, MFC1_FM<2>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 97 Opc = Mips::CFC1; in copyPhysReg()
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| D | MipsScheduleP5600.td | 572 def : InstRW<[P5600WriteMoveFPUToGPR], (instrs BC1F, BC1FL, BC1T, BC1TL, CFC1,
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| D | MipsInstrFPU.td | 520 def CFC1 : MMRel, MFC1_FT<"cfc1", GPR32Opnd, CCROpnd, II_CFC1>, MFC1_FM<2>,
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| D | MipsScheduleGeneric.td | 867 ExtractElementF64_64, CFC1, CTC1,
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 97 Opc = Mips::CFC1; in copyPhysReg()
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| D | MipsScheduleP5600.td | 573 def : InstRW<[P5600WriteMoveFPUToGPR], (instrs BC1F, BC1FL, BC1T, BC1TL, CFC1,
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| D | MipsInstrFPU.td | 553 def CFC1 : MMRel, MFC1_FT<"cfc1", GPR32Opnd, CCROpnd, II_CFC1>, MFC1_FM<2>,
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| D | MipsScheduleGeneric.td | 870 ExtractElementF64_64, CFC1, CTC1,
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_common.c | 152 #define CFC1 (HI(17) | (2 << 21)) macro
2148 FAIL_IF(push_inst(compiler, CFC1 | TA(dst_ar) | DA(FCSR_REG), dst_ar)); in sljit_emit_op_flags()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3147 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
3148 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 946 {DBGFIELD("CFC1") 1, false, false, 16, 2, 2, 1, 0, 0}, // #686
2630 {DBGFIELD("CFC1") 2, false, false, 68, 4, 2, 1, 0, 0}, // #686
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| D | MipsGenMCCodeEmitter.inc | 995 UINT64_C(1145044992), // CFC1
6663 case Mips::CFC1:
10457 CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // CFC1 = 982
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| D | MipsGenAsmWriter.inc | 2223 16482U, // CFC1
4977 0U, // CFC1
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| D | MipsGenInstrInfo.inc | 997 CFC1 = 982,
3466 CFC1 = 686,
5843 …nmodeledSideEffects), 0x4ULL, nullptr, nullptr, OperandInfo198, -1 ,nullptr }, // Inst #982 = CFC1
16716 { Mips::CFC1, Mips::CFC1, Mips::CFC1_MM },
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 383 16444U, // CFC1
2172 0U, // CFC1
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| D | MipsGenDisassemblerTables.inc | 995 /* 1617 */ MCD_OPC_Decode, 238, 2, 85, // Opcode: CFC1
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4350 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
4351 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4322 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
4323 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
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| /external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/ |
| D | NormalizationTest-3.2.0.txt | 11406 CFC1;CFC1;110F 116C 11C0;CFC1;110F 116C 11C0;
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| /external/icu/icu4c/source/test/testdata/ |
| D | NormalizationTest-3.2.0.txt | 11408 CFC1;CFC1;110F 116C 11C0;CFC1;110F 116C 11C0;
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| /external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/ |
| D | NormalizationTest-3.2.0.txt | 11406 CFC1;CFC1;110F 116C 11C0;CFC1;110F 116C 11C0;
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| D | NormalizationTest.txt | 11572 CFC1;CFC1;110F 116C 11C0;CFC1;110F 116C 11C0;
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| /external/icu/icu4c/source/data/unidata/ |
| D | NormalizationTest.txt | 11572 CFC1;CFC1;110F 116C 11C0;CFC1;110F 116C 11C0;
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