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Searched refs:CLK_DIVIDER_ALLOW_ZERO (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/xilinx/zynqmp/pm_service/
Dpm_api_clock.c140 CLK_DIVIDER_ALLOW_ZERO, \
154 CLK_DIVIDER_ALLOW_ZERO, \
168 CLK_DIVIDER_ALLOW_ZERO, \
349 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
396 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO |
407 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO |
447 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
459 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
523 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
536 .typeflags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
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Dpm_api_clock.h49 #define CLK_DIVIDER_ALLOW_ZERO BIT(2) macro