| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 126 CMGE, enumerator
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| D | AArch64InstrInfo.td | 236 def AArch64cmge: SDNode<"AArch64ISD::CMGE", SDT_AArch64binvec>;
2771 defm CMGE : SIMDCmpTwoVector<1, 0b01000, "cmge", AArch64cmgez>;
2938 defm CMGE : SIMDThreeSameVector<0, 0b00111, "cmge", AArch64cmge>;
3245 defm CMGE : SIMDThreeScalarD<0, 0b00111, "cmge", AArch64cmge>;
3341 defm CMGE : SIMDCmpTwoScalarD< 1, 0b01000, "cmge", AArch64cmgez>;
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| D | AArch64ISelLowering.cpp | 891 case AArch64ISD::CMGE: return "AArch64ISD::CMGE"; in getTargetNodeName()
6743 return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); in EmitVectorComparison()
6751 return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 126 CMGE, enumerator
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| D | AArch64InstrInfo.td | 473 def AArch64cmge: SDNode<"AArch64ISD::CMGE", SDT_AArch64binvec>;
3665 defm CMGE : SIMDCmpTwoVector<1, 0b01000, "cmge", AArch64cmgez>;
3834 defm CMGE : SIMDThreeSameVector<0, 0b00111, "cmge", AArch64cmge>;
4156 defm CMGE : SIMDThreeScalarD<0, 0b00111, "cmge", AArch64cmge>;
4257 defm CMGE : SIMDCmpTwoScalarD< 1, 0b01000, "cmge", AArch64cmgez>;
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| D | AArch64ISelLowering.cpp | 1293 case AArch64ISD::CMGE: return "AArch64ISD::CMGE"; in getTargetNodeName()
8447 return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); in EmitVectorComparison()
8455 return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 195 CMGE, enumerator
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| D | AArch64InstrInfo.td | 488 def AArch64cmge: SDNode<"AArch64ISD::CMGE", SDT_AArch64binvec>;
3855 defm CMGE : SIMDCmpTwoVector<1, 0b01000, "cmge", AArch64cmgez>;
4020 defm CMGE : SIMDThreeSameVector<0, 0b00111, "cmge", AArch64cmge>;
4334 defm CMGE : SIMDThreeScalarD<0, 0b00111, "cmge", AArch64cmge>;
4435 defm CMGE : SIMDCmpTwoScalarD< 1, 0b01000, "cmge", AArch64cmgez>;
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| D | AArch64ISelLowering.cpp | 1765 MAKE_CASE(AArch64ISD::CMGE) in getTargetNodeName()
10095 return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); in EmitVectorComparison()
10103 return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
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| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 1009 def CMGE : SInst<"vcgez", "ud", "csilfdQcQsQiQlQfQd">;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3337 ### CMGE ### subsection
3344 ### CMGE ### subsection
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| /external/llvm-project/clang/include/clang/Basic/ |
| D | arm_neon.td | 872 def CMGE : SInst<"vcgez", "U.", "csilfdQcQsQiQlQfQd">;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 4845 // FastEmit functions for AArch64ISD::CMGE.
9786 …case AArch64ISD::CMGE: return fastEmit_AArch64ISD_CMGE_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKil…
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| D | AArch64GenAsmWriter.inc | 12136 // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE...
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| /external/capstone/arch/AArch64/ |
| D | AArch64GenAsmWriter.inc | 5562 // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE...
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