Home
last modified time | relevance | path

Searched refs:CMOV (Results 1 – 25 of 90) sorted by relevance

1234

/external/llvm/test/CodeGen/X86/
Datomic32.ll1 …lc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
2 …: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV
8 ; WITH-CMOV-LABEL: atomic_fetch_add32:
12 ; WITH-CMOV: lock
13 ; WITH-CMOV: incl
15 ; WITH-CMOV: lock
16 ; WITH-CMOV: addl $3
18 ; WITH-CMOV: lock
19 ; WITH-CMOV: xaddl
21 ; WITH-CMOV: lock
[all …]
Dcmovcmov.ll1 …verbose=false -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK --check-prefix=CMOV
12 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
13 ; CMOV-NEXT: cmovnel %esi, %edi
14 ; CMOV-NEXT: cmovpl %esi, %edi
15 ; CMOV-NEXT: movl %edi, %eax
16 ; CMOV-NEXT: retq
39 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
40 ; CMOV-NEXT: cmovneq %rsi, %rdi
41 ; CMOV-NEXT: cmovpq %rsi, %rdi
42 ; CMOV-NEXT: movq %rdi, %rax
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dcmov-promotion.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV
6 ; CMOV-LABEL: cmov_zpromotion_8_to_16:
7 ; CMOV: # %bb.0:
8 ; CMOV-NEXT: testb $1, %dil
9 ; CMOV-NEXT: movl $117, %ecx
10 ; CMOV-NEXT: movl $237, %eax
11 ; CMOV-NEXT: cmovnel %ecx, %eax
12 ; CMOV-NEXT: # kill: def $ax killed $ax killed $eax
13 ; CMOV-NEXT: retq
31 ; CMOV-LABEL: cmov_zpromotion_8_to_32:
[all …]
D8bit_cmov_of_trunc_promotion.ll3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=I386-CMOV
5 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=I686-CMOV
26 ; I386-CMOV-LABEL: t0:
27 ; I386-CMOV: # %bb.0:
28 ; I386-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
29 ; I386-CMOV-NEXT: movl {{[0-9]+}}(%esp), %ecx
30 ; I386-CMOV-NEXT: addl %eax, %ecx
31 ; I386-CMOV-NEXT: addl {{[0-9]+}}(%esp), %eax
32 ; I386-CMOV-NEXT: cmpb %al, %cl
33 ; I386-CMOV-NEXT: cmovgl %ecx, %eax
[all …]
Dfp-strict-scalar-cmp.ll9 …llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,+cmov -O3 | FileCheck %s --check-prefix=X87-CMOV
69 ; X87-CMOV-LABEL: test_f32_oeq_q:
70 ; X87-CMOV: # %bb.0:
71 ; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp)
72 ; X87-CMOV-NEXT: flds {{[0-9]+}}(%esp)
73 ; X87-CMOV-NEXT: fucompi %st(1), %st
74 ; X87-CMOV-NEXT: fstp %st(0)
75 ; X87-CMOV-NEXT: wait
76 ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %eax
77 ; X87-CMOV-NEXT: leal {{[0-9]+}}(%esp), %ecx
[all …]
Dcmovcmov.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CMOV
12 ; CMOV-LABEL: test_select_fcmp_oeq_i32:
13 ; CMOV: # %bb.0: # %entry
14 ; CMOV-NEXT: movl %edi, %eax
15 ; CMOV-NEXT: ucomiss %xmm1, %xmm0
16 ; CMOV-NEXT: cmovnel %esi, %eax
17 ; CMOV-NEXT: cmovpl %esi, %eax
18 ; CMOV-NEXT: retq
44 ; CMOV-LABEL: test_select_fcmp_oeq_i64:
45 ; CMOV: # %bb.0: # %entry
[all …]
Diabs.ll2 …llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 --check-prefix=X86-NO-CMOV
3 …mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-CMOV
38 ; X86-NO-CMOV-LABEL: test_i16:
39 ; X86-NO-CMOV: # %bb.0:
40 ; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
41 ; X86-NO-CMOV-NEXT: movl %eax, %ecx
42 ; X86-NO-CMOV-NEXT: sarl $15, %ecx
43 ; X86-NO-CMOV-NEXT: addl %ecx, %eax
44 ; X86-NO-CMOV-NEXT: xorl %ecx, %eax
45 ; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
[all …]
Datomic32.ll3 …i686-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefixes=X86,X86-CMOV
291 ; X86-CMOV-LABEL: atomic_fetch_max32:
292 ; X86-CMOV: # %bb.0:
293 ; X86-CMOV-NEXT: subl $12, %esp
294 ; X86-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
295 ; X86-CMOV-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
296 ; X86-CMOV-NEXT: movl sc32, %eax
297 ; X86-CMOV-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
298 ; X86-CMOV-NEXT: .LBB6_1: # %atomicrmw.start
299 ; X86-CMOV-NEXT: # =>This Inner Loop Header: Depth=1
[all …]
Dclz.ll3 …N: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefixes=X86,X86-CMOV
110 ; X86-CMOV-LABEL: cttz_i64:
111 ; X86-CMOV: # %bb.0:
112 ; X86-CMOV-NEXT: movl {{[0-9]+}}(%esp), %ecx
113 ; X86-CMOV-NEXT: bsfl %ecx, %edx
114 ; X86-CMOV-NEXT: bsfl {{[0-9]+}}(%esp), %eax
115 ; X86-CMOV-NEXT: addl $32, %eax
116 ; X86-CMOV-NEXT: testl %ecx, %ecx
117 ; X86-CMOV-NEXT: cmovnel %edx, %eax
118 ; X86-CMOV-NEXT: xorl %edx, %edx
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/
Dcmov.ll1 … -mcpu=mips32 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … -mcpu=mips32 -regalloc=basic -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
3 … -mcpu=mips32r2 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
5 … -mcpu=mips4 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
6 … -mcpu=mips64 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
14 ; 32-CMOV-DAG: lw $[[R0:[0-9]+]], %got(i3)
15 ; 32-CMOV-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
16 ; 32-CMOV-DAG: movn $[[R0]], $[[R1]], $4
17 ; 32-CMOV-DAG: lw $2, 0($[[R0]])
26 ; 64-CMOV-DAG: ldr $[[R0:[0-9]+]]
[all …]
Dzeroreg.ll1 … < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
4 …sel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
5 …sel -mcpu=mips64 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
6 …sel -mcpu=mips64r2 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
15 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
16 ; 32-CMOV: movn $2, $zero, $4
21 ; 64-CMOV: lw $2, 0(${{[0-9]+}})
22 ; 64-CMOV: movn $2, $zero, $4
37 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
[all …]
/external/llvm/test/CodeGen/Mips/
Dcmov.ll1 … -mcpu=mips32 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … -mcpu=mips32 -regalloc=basic -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
3 … -mcpu=mips32r2 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,32-CMOV
5 … -mcpu=mips4 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
6 … -mcpu=mips64 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,64-CMOV
14 ; 32-CMOV-DAG: lw $[[R0:[0-9]+]], %got(i3)
15 ; 32-CMOV-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
16 ; 32-CMOV-DAG: movn $[[R0]], $[[R1]], $4
17 ; 32-CMOV-DAG: lw $2, 0($[[R0]])
26 ; 64-CMOV-DAG: ldr $[[R0:[0-9]+]]
[all …]
Dzeroreg.ll1 … < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
2 … < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32-CMOV
4 …sel -mcpu=mips4 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
5 …sel -mcpu=mips64 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
6 …sel -mcpu=mips64r2 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64-CMOV
15 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
16 ; 32-CMOV: movn $2, $zero, $4
21 ; 64-CMOV: lw $2, 0(${{[0-9]+}})
22 ; 64-CMOV: movn $2, $zero, $4
37 ; 32-CMOV: lw $2, 0(${{[0-9]+}})
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-flt.ll4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
47 ; CMOV-32: mtc1 $6, $f0
[all …]
Dselect-dbl.ll4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
47 ; CMOV-32: mtc1 $7, $[[F0:f[0-9]+]]
[all …]
Dselect-int.ll4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
45 ; CMOV: andi $[[T0:[0-9]+]], $4, 1
[all …]
/external/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/
Dbasic.ll.expected2 …llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 --check-prefix=X86-NO-CMOV
3 …mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X86 --check-prefix=X86-CMOV
32 ; X86-NO-CMOV-LABEL: test_i16:
33 ; X86-NO-CMOV: # %bb.0:
34 ; X86-NO-CMOV-NEXT: movswl {{[0-9]+}}(%esp), %eax
35 ; X86-NO-CMOV-NEXT: movl %eax, %ecx
36 ; X86-NO-CMOV-NEXT: sarl $15, %ecx
37 ; X86-NO-CMOV-NEXT: addl %ecx, %eax
38 ; X86-NO-CMOV-NEXT: xorl %ecx, %eax
39 ; X86-NO-CMOV-NEXT: # kill: def $ax killed $ax killed $eax
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-int.ll4 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32
6 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32
8 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32
10 ; RUN: -check-prefixes=ALL,CMOV,CMOV-32
16 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
18 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
20 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
22 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
24 ; RUN: -check-prefixes=ALL,CMOV,CMOV-64
46 ; CMOV: andi $[[T0:[0-9]+]], $4, 1
[all …]
Dadd.ll4 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP32,GP32-CMOV
6 ; RUN: -check-prefixes=ALL,R2-R6,GP32,GP32-CMOV
8 ; RUN: -check-prefixes=ALL,R2-R6,GP32,GP32-CMOV
10 ; RUN: -check-prefixes=ALL,R2-R6,GP32,GP32-CMOV
153 ; GP32-CMOV: lw $[[T0:[0-9]+]], 24($sp)
154 ; GP32-CMOV: addu $[[T1:[0-9]+]], $6, $[[T0]]
155 ; GP32-CMOV: lw $[[T2:[0-9]+]], 28($sp)
156 ; GP32-CMOV: addu $[[T3:[0-9]+]], $7, $[[T2]]
157 ; GP32-CMOV: sltu $[[T4:[0-9]+]], $[[T3]], $7
158 ; GP32-CMOV: addu $[[T5:[0-9]+]], $[[T1]], $[[T4]]
[all …]
/external/llvm/lib/Target/X86/
DX86InstrCMovSetCC.td16 // CMOV instructions.
17 multiclass CMOV<bits<8> opc, string Mnemonic, PatLeaf CondNode> {
64 defm CMOVO : CMOV<0x40, "cmovo" , X86_COND_O>;
65 defm CMOVNO : CMOV<0x41, "cmovno", X86_COND_NO>;
66 defm CMOVB : CMOV<0x42, "cmovb" , X86_COND_B>;
67 defm CMOVAE : CMOV<0x43, "cmovae", X86_COND_AE>;
68 defm CMOVE : CMOV<0x44, "cmove" , X86_COND_E>;
69 defm CMOVNE : CMOV<0x45, "cmovne", X86_COND_NE>;
70 defm CMOVBE : CMOV<0x46, "cmovbe", X86_COND_BE>;
71 defm CMOVA : CMOV<0x47, "cmova" , X86_COND_A>;
[all …]
/external/swiftshader/src/Reactor/
DCPUID.cpp33 bool CPUID::CMOV = detectCMOV(); member in rr::CPUID
66 if(!CMOV) in setEnableCMOV()
192 return CMOV = (registers[3] & 0x00008000) != 0; in detectCMOV()
DCPUID.hpp50 static bool CMOV; member in rr::CPUID
87 return CMOV && enableCMOV; in supportsCMOV()
/external/swiftshader/src/System/
DCPUID.cpp33 bool CPUID::CMOV = detectCMOV(); member in sw::CPUID
68 if(!CMOV) in setEnableCMOV()
194 return CMOV = (registers[3] & 0x00008000) != 0; in detectCMOV()
DCPUID.hpp55 static bool CMOV; member in sw::CPUID
96 return CMOV && enableCMOV; in supportsCMOV()
/external/swiftshader/src/Common/
DCPUID.cpp33 bool CPUID::CMOV = detectCMOV(); member in sw::CPUID
68 if(!CMOV) in setEnableCMOV()
192 return CMOV = (registers[3] & 0x00008000) != 0; in detectCMOV()

1234