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Searched refs:COND1 (Results 1 – 25 of 32) sorted by relevance

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/external/llvm-project/llvm/test/Transforms/Util/
Dlibcalls-shrinkwrap-double.ll11 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt double %value, -7.100000e+02
13 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
21 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt double %value, -7.450000e+02
23 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
31 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt double %value, -1.074000e+03
33 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
41 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt double %value, -7.100000e+02
43 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
70 ; CHECK: [[COND1:%[0-9]+]] = fcmp ogt double %value, 1.000000e+00
72 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
[all …]
Dlibcalls-shrinkwrap-float.ll11 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt float %value, -8.900000e+01
13 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
21 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt float %value, -1.030000e+02
23 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
31 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt float %value, -1.490000e+02
33 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
41 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt float %value, -8.900000e+01
43 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
71 ; CHECK: [[COND1:%[0-9]+]] = fcmp ogt float %value, 1.000000e+00
73 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
[all …]
Dlibcalls-shrinkwrap-long-double.ll11 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt x86_fp80 %value, 0xKC00CB174000000000000
13 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
21 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt x86_fp80 %value, 0xKC00CB21C000000000000
23 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
31 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt x86_fp80 %value, 0xKC00D807A000000000000
33 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
41 ; CHECK: [[COND1:%[0-9]+]] = fcmp olt x86_fp80 %value, 0xKC00CB174000000000000
43 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
71 ; CHECK: [[COND1:%[0-9]+]] = fcmp ogt x86_fp80 %value, 0xK3FFF8000000000000000
73 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
[all …]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dabs_abs.ll696 ; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
697 ; CHECK-NEXT: ret i32 [[COND1]]
712 ; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
713 ; CHECK-NEXT: ret i32 [[COND1]]
728 ; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
729 ; CHECK-NEXT: ret i32 [[COND1]]
744 ; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
745 ; CHECK-NEXT: ret i32 [[COND1]]
760 ; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
761 ; CHECK-NEXT: ret i32 [[COND1]]
[all …]
Dcall_nonnull_arg.ll10 ; CHECK-NEXT: [[COND1:%.*]] = icmp eq i32* %a, null
11 ; CHECK-NEXT: br i1 [[COND1]], label %dead, label %not_null
Dxor-of-icmps-with-extra-uses.ll132 ; CHECK-NEXT: [[COND1:%.*]] = icmp sgt i32 [[X]], -32768
136 ; CHECK-NEXT: [[RES:%.*]] = xor i1 [[COND0]], [[COND1]]
153 ; CHECK-NEXT: [[COND1:%.*]] = icmp sgt i32 [[X]], -32768
154 ; CHECK-NEXT: [[RES:%.*]] = xor i1 [[COND0]], [[COND1]]
Dselect_meta.ll109 ; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 %x, !prof ![[$MD3:[0-9]+]]
110 ; CHECK-NEXT: ret i32 [[COND1]]
127 ; CHECK-NEXT: [[COND1:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x, !prof ![…
128 ; CHECK-NEXT: ret <2 x i32> [[COND1]]
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/
Drewrite-loop-exit-value.ll66 ; CHECK-NEXT: [[COND1:%.*]] = icmp eq i32* [[VAR:%.*]], null
76 ; CHECK-NEXT: br i1 [[COND1]], label [[HEADER_BACKEDGE]], label [[EXIT:%.*]]
104 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]]
132 ; CHECK-NEXT: [[COND1:%.*]] = load volatile i1, i1* [[ADDR:%.*]], align 1
133 ; CHECK-NEXT: br i1 [[COND1]], label [[LOOP]], label [[MAYBE:%.*]]
/external/llvm-project/clang/test/CodeGenObjC/
Darc-loadweakretained-release.m53 // CHECK: [[COND1:%.*]] = phi i8**
54 // CHECK-NEXT: [[ICRISNULL:%.*]] = icmp eq i8** [[COND1]], null
65 // CHECK-NEXT: [[ICRISNULL1:%.*]] = icmp eq i8** [[COND1]], null
/external/clang/test/CodeGenObjC/
Darc-loadweakretained-release.m53 // CHECK: [[COND1:%.*]] = phi i8**
54 // CHECK-NEXT: [[ICRISNULL:%.*]] = icmp eq i8** [[COND1]], null
65 // CHECK-NEXT: [[ICRISNULL1:%.*]] = icmp eq i8** [[COND1]], null
/external/llvm-project/llvm/test/Transforms/IRCE/
Dstride_more_than_1.ll19 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
20 ; CHECK-NEXT: br i1 [[COND1]], label %loop.preheader, label %main.pseudo.exit
84 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
85 ; CHECK-NEXT: br i1 [[COND1]], label %loop.preheader, label %main.pseudo.exit
150 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
151 ; CHECK-NEXT: br i1 [[COND1]], label %loop.preheader, label %main.pseudo.exit
258 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp sgt i32 100, %exit.preloop.at
259 ; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit
324 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483640, %exit.preloop.at
325 ; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit
[all …]
Dempty_ranges.ll31 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ult i32 %idx.next, 10
32 ; CHECK-NEXT: br i1 [[COND1]], label %loop, label %main.exit.selector
Dunsigned_comparisons_ugt.ll60 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
61 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
151 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
152 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
Dunsigned_comparisons_ult.ll63 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
64 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
196 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1
197 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dinst-select-icmp.mir22 # GCN-NEXT: [[COND1:%[0-9]+]]:sreg_32 = COPY $scc
25 # GCN: $scc = COPY [[COND1]]
134 # GCN: [[COND1:%[0-9]+]]:[[VCCRC]] = V_CMP_NE_U32_e64 [[VGPR6]], [[VGPR7]]
136 # GCN: V_CNDMASK_B32_e64 0, [[VGPR5]], 0, [[VGPR4]], [[COND1]]
/external/llvm-project/llvm/test/Transforms/LoopUnroll/
Dunroll-loop-invalidation.ll67 ; CHECK: %[[COND1:.*]] = icmp eq i32 %{{.*}}, %inner1.count
68 ; CHECK: br i1 %[[COND1]],
Druntime-loop-branchweight.ll7 ; CHECK: br i1 [[COND1:%.*]], label %for.end.loopexit.unr-lcssa.loopexit, label %for.body, !prof ![…
/external/llvm-project/mlir/test/Conversion/SPIRVToLLVM/
Dcontrol-flow-ops-to-llvm.mlir48 // CHECK: %[[COND1:.*]] = llvm.mlir.constant(true) : !llvm.i1
53 // CHECK: llvm.cond_br %[[COND1]], ^bb1(%{{.*}}, %[[COND2]] : !llvm.i32, !llvm.i1), ^bb2
/external/llvm-project/llvm/test/Transforms/LoopInterchange/
Dupdate-condbranch-duplicate-successors.ll30 ; CHECK-NEXT: [[COND1:%.*]] = icmp eq i64 [[INNER_IV_NEXT]], 1000
100 ; CHECK-NEXT: [[COND1:%.*]] = icmp eq i64 [[INNER_IV_NEXT]], 1000
/external/llvm-project/llvm/test/Transforms/MakeGuardsExplicit/
Dbasic.ll30 ; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[COND1:%.*]], [[WIDENABLE_COND]]
65 ; CHECK-NEXT: [[EXIPLICIT_GUARD_COND:%.*]] = and i1 [[COND1:%.*]], [[WIDENABLE_COND]]
/external/llvm-project/llvm/test/Transforms/JumpThreading/
Dthread-two-bbs-threshold.ll13 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[COND1:%.*]], 0
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dinfinite-loop.ll171 ; IR-NEXT: [[COND1:%.*]] = icmp eq i32 [[TMP]], 1
172 ; IR-NEXT: br i1 [[COND1]], label [[OUTER_LOOP:%.*]], label [[UNIFIEDRETURNBLOCK:%.*]]
/external/llvm-project/llvm/test/Transforms/SimplifyCFG/X86/
DSpeculativeExec.ll75 ; CHECK-NEXT: [[COND1:%.*]] = load volatile i1, i1* [[DUMMY:%.*]]
76 ; CHECK-NEXT: br i1 [[COND1]], label [[IF:%.*]], label [[END:%.*]]
/external/llvm-project/llvm/test/Transforms/SimpleLoopUnswitch/
Dguards.ll42 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
182 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
/external/llvm-project/llvm/test/Transforms/LoopSimplifyCFG/
Dconstant-fold-branch.ll1450 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%…
1519 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[LOOP_1_BACKEDGE_LOOPEXIT:%…
1584 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
1654 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
1726 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
1792 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
1860 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
1940 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
2022 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
2098 ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]]
[all …]

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