Searched refs:CPLL_ID (Results 1 – 11 of 11) sorted by relevance
| /external/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/ |
| D | soc.c | 139 plls_suspend(CPLL_ID); in pm_plls_suspend()
153 mmio_write_32(CRU_BASE + PLL_CONS(CPLL_ID, 3), in plls_resume()
154 plls_con[CPLL_ID][3] | PLL_BYPASS_W_MSK); in plls_resume()
181 mmio_write_32(CRU_BASE + PLL_CONS(CPLL_ID, 3), in pm_plls_resume()
182 plls_con[CPLL_ID][3] | PLLS_MODE_WMASK); in pm_plls_resume()
192 mmio_write_32(CRU_BASE + PLL_CONS((CPLL_ID), 3), PLL_SLOW_BITS); in rockchip_soc_soft_reset()
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| D | soc.h | 14 CPLL_ID, enumerator
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| /external/arm-trusted-firmware/plat/rockchip/px30/drivers/soc/ |
| D | soc.h | 19 CPLL_ID, enumerator
96 #define PLL_MODE_SHIFT(id) ((id) == CPLL_ID ? \
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| /external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/ |
| D | soc.c | 97 _pll_suspend(CPLL_ID); in disable_dvfs_plls()
309 _pll_resume(CPLL_ID); in enable_dvfs_plls()
335 set_pll_slow_mode(CPLL_ID); in soc_global_soft_reset()
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| D | soc.h | 100 CPLL_ID, enumerator
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| /external/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/ |
| D | pmu.c | 195 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(CPLL_ID)); in rockchip_soc_soft_reset()
378 pll_suspend(CPLL_ID); in pm_plls_suspend()
438 pll_pwr_dwn(CPLL_ID, pmu_pd_on); in pm_plls_resume()
443 pll_resume(CPLL_ID); in pm_plls_resume()
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| /external/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/ |
| D | soc.h | 28 CPLL_ID, enumerator
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| /external/arm-trusted-firmware/plat/rockchip/rk3288/drivers/soc/ |
| D | soc.h | 13 CPLL_ID, enumerator
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| D | soc.c | 118 pll_save(CPLL_ID); in clk_plls_suspend()
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| /external/arm-trusted-firmware/plat/rockchip/px30/drivers/pmu/ |
| D | pmu.c | 939 pll_suspend(CPLL_ID); in pm_plls_suspend()
962 pll_resume(CPLL_ID); in pm_plls_resume()
1002 pll_set_mode(CPLL_ID, SLOW_MODE); in rockchip_soc_soft_reset()
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| /external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/ |
| D | pmu.c | 1302 (i == CRU_PLL_CON(CPLL_ID, 2)) || in cru_register_restore()
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