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/external/cpuinfo/test/cpuid/
Dleagoo-t5c.log1 CPUID 00000000: 00000017-756E6547-6C65746E-49656E69 [GenuineIntel]
2 CPUID 00000001: 0007065A-02200800-03D8E20B-1F8BFBFF
3 CPUID 00000002: 61B4A001-0000FFC0-00000000-00000000
4 CPUID 00000003: 00000000-00000000-00000000-00000000
5 CPUID 00000004: 3C000121-00C0003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 3C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 3C01C143-03C0003F-000003FF-00000001 [SL 02]
8 CPUID 00000005: 00000040-00000040-00000003-03000020
9 CPUID 00000006: 00000004-00000000-00000000-00000000
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
[all …]
Dmemo-pad-7.log1 CPUID 00000000: 0000000B-756E6547-6C65746E-49656E69 [GenuineIntel]
2 CPUID 00000001: 00030678-00100800-43D8E3BF-BFEBFBFF
3 CPUID 00000002: 61B3A001-0000FFC2-00000000-00000000
4 CPUID 00000003: 00000000-00000000-00000000-00000000
5 CPUID 00000004: 1C000121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 1C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 1C00C143-03C0003F-000003FF-00000001 [SL 02]
8 CPUID 00000005: 00000040-00000040-00000003-33000020
9 CPUID 00000006: 00000007-00000002-00000009-00000000
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
[all …]
Dzenfone-2.log1 CPUID 00000000: 0000000B-756E6547-6C65746E-49656E69 [GenuineIntel]
2 CPUID 00000001: 000506A0-00100800-43D8E3BF-BFEBFBFF
3 CPUID 00000002: 61B3A001-0000FFC2-00000000-00000000
4 CPUID 00000003: 00000000-00000000-00000000-00000000
5 CPUID 00000004: 1C000121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 1C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 1C00C143-03C0003F-000003FF-00000001 [SL 02]
8 CPUID 00000005: 00000040-00000040-00000003-33000020
9 CPUID 00000006: 00000007-00000002-00000009-00000000
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
[all …]
Dalldocube-iwork8.log1 CPUID 00000000: 0000000B-756E6547-6C65746E-49656E69 [GenuineIntel]
2 CPUID 00000001: 000406C4-00100800-43D8E3BF-BFEBFBFF
3 CPUID 00000002: 61B4A001-0000FFC2-00000000-00000000
4 CPUID 00000003: 00000000-00000000-00000000-00000000
5 CPUID 00000004: 1C000121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 1C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 1C00C143-03C0003F-000003FF-00000001 [SL 02]
8 CPUID 00000005: 00000040-00000040-00000003-33000020
9 CPUID 00000006: 00000007-00000002-00000009-00000000
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
[all …]
Dzenfone-2e.log1 CPUID 00000000: 0000000A-756E6547-6C65746E-49656E69 [GenuineIntel]
2 CPUID 00000001: 00030651-02040800-0040C3BD-BFE9FBFF
3 CPUID 00000002: 4FBA5901-0E3080C0-00000000-00000000
4 CPUID 00000003: 00000000-00000000-00000000-00000000
5 CPUID 00000004: 04004121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 04004122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 04004143-01C0003F-000003FF-00000001 [SL 02]
8 CPUID 00000005: 00000040-00000040-00000003-03020220
9 CPUID 00000006: 00000005-00000002-00000001-00000000
10 CPUID 00000007: 00000000-00000000-00000000-00000000 [SL 00]
[all …]
Dzenfone-c.log1 CPUID 00000000: 0000000A-756E6547-6C65746E-49656E69 [GenuineIntel]
2 CPUID 00000001: 00030651-03040800-0040C3BD-BFE9FBFF
3 CPUID 00000002: 4FBA5901-0E3080C0-00000000-00000000
4 CPUID 00000003: 00000000-00000000-00000000-00000000
5 CPUID 00000004: 04004121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 04004122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 04004143-01C0003F-000003FF-00000001 [SL 02]
8 CPUID 00000005: 00000040-00000040-00000003-03020220
9 CPUID 00000006: 00000005-00000002-00000001-00000000
10 CPUID 00000007: 00000000-00000000-00000000-00000000 [SL 00]
[all …]
/external/swiftshader/src/System/
DCPUID.cpp32 bool CPUID::MMX = detectMMX();
33 bool CPUID::CMOV = detectCMOV();
34 bool CPUID::SSE = detectSSE();
35 bool CPUID::SSE2 = detectSSE2();
36 bool CPUID::SSE3 = detectSSE3();
37 bool CPUID::SSSE3 = detectSSSE3();
38 bool CPUID::SSE4_1 = detectSSE4_1();
39 int CPUID::cores = detectCoreCount();
40 int CPUID::affinity = detectAffinity();
42 bool CPUID::enableMMX = true;
[all …]
DCPUID.hpp28 class CPUID class
89 inline bool CPUID::supportsMMX() in supportsMMX()
94 inline bool CPUID::supportsCMOV() in supportsCMOV()
99 inline bool CPUID::supportsMMX2() in supportsMMX2()
104 inline bool CPUID::supportsSSE() in supportsSSE()
109 inline bool CPUID::supportsSSE2() in supportsSSE2()
114 inline bool CPUID::supportsSSE3() in supportsSSE3()
119 inline bool CPUID::supportsSSSE3() in supportsSSSE3()
124 inline bool CPUID::supportsSSE4_1() in supportsSSE4_1()
129 inline int CPUID::coreCount() in coreCount()
[all …]
DBUILD.gn20 "CPUID.hpp",
41 "CPUID.cpp",
DCMakeLists.txt25 CPUID.cpp
26 CPUID.hpp
/external/swiftshader/src/Common/
DCPUID.cpp32 bool CPUID::MMX = detectMMX();
33 bool CPUID::CMOV = detectCMOV();
34 bool CPUID::SSE = detectSSE();
35 bool CPUID::SSE2 = detectSSE2();
36 bool CPUID::SSE3 = detectSSE3();
37 bool CPUID::SSSE3 = detectSSSE3();
38 bool CPUID::SSE4_1 = detectSSE4_1();
39 int CPUID::cores = detectCoreCount();
40 int CPUID::affinity = detectAffinity();
42 bool CPUID::enableMMX = true;
[all …]
DCPUID.hpp28 class CPUID class
86 inline bool CPUID::supportsMMX() in supportsMMX()
91 inline bool CPUID::supportsCMOV() in supportsCMOV()
96 inline bool CPUID::supportsMMX2() in supportsMMX2()
101 inline bool CPUID::supportsSSE() in supportsSSE()
106 inline bool CPUID::supportsSSE2() in supportsSSE2()
111 inline bool CPUID::supportsSSE3() in supportsSSE3()
116 inline bool CPUID::supportsSSSE3() in supportsSSSE3()
121 inline bool CPUID::supportsSSE4_1() in supportsSSE4_1()
126 inline int CPUID::coreCount() in coreCount()
[all …]
DCMakeLists.txt27 CPUID.cpp
41 CPUID.hpp
/external/swiftshader/src/Reactor/
DCPUID.cpp32 bool CPUID::MMX = detectMMX();
33 bool CPUID::CMOV = detectCMOV();
34 bool CPUID::SSE = detectSSE();
35 bool CPUID::SSE2 = detectSSE2();
36 bool CPUID::SSE3 = detectSSE3();
37 bool CPUID::SSSE3 = detectSSSE3();
38 bool CPUID::SSE4_1 = detectSSE4_1();
40 bool CPUID::enableMMX = true;
41 bool CPUID::enableCMOV = true;
42 bool CPUID::enableSSE = true;
[all …]
DCPUID.hpp28 class CPUID class
80 inline bool CPUID::supportsMMX() in supportsMMX()
85 inline bool CPUID::supportsCMOV() in supportsCMOV()
90 inline bool CPUID::supportsMMX2() in supportsMMX2()
95 inline bool CPUID::supportsSSE() in supportsSSE()
100 inline bool CPUID::supportsSSE2() in supportsSSE2()
105 inline bool CPUID::supportsSSE3() in supportsSSE3()
110 inline bool CPUID::supportsSSSE3() in supportsSSSE3()
115 inline bool CPUID::supportsSSE4_1() in supportsSSE4_1()
/external/cpu_features/src/
Dcpuinfo_x86.c1413 #define CPUID(FAMILY, MODEL) ((((FAMILY)&0xFF) << 8) | ((MODEL)&0xFF)) macro
1417 switch (CPUID(info->family, info->model)) { in GetX86Microarchitecture()
1418 case CPUID(0x06, 0x35): in GetX86Microarchitecture()
1419 case CPUID(0x06, 0x36): in GetX86Microarchitecture()
1422 case CPUID(0x06, 0x37): in GetX86Microarchitecture()
1423 case CPUID(0x06, 0x4C): in GetX86Microarchitecture()
1426 case CPUID(0x06, 0x5C): in GetX86Microarchitecture()
1429 case CPUID(0x06, 0x0F): in GetX86Microarchitecture()
1430 case CPUID(0x06, 0x16): in GetX86Microarchitecture()
1433 case CPUID(0x06, 0x17): in GetX86Microarchitecture()
[all …]
/external/cpuinfo/
DREADME.md22 - ID (**MIDR** on ARM, **CPUID** leaf 1 EAX value on x86) for each CPU core
155 - [x] Using CPUID leaves 0x80000002–0x80000004 on x86/x86-64
173 - [x] Using CPUID (x86/x86-64)
180 - [ ] Using CPUID registers on ARM64 (Linux)
182 - [x] Using CPUID leaf 0x00000002 (x86/x86-64)
183 - [x] Using CPUID leaf 0x00000004 (non-AMD x86/x86-64)
184 - [ ] Using CPUID leaves 0x80000005-0x80000006 (AMD x86/x86-64)
185 - [x] Using CPUID leaf 0x8000001D (AMD x86/x86-64)
193 - [x] Using CPUID leaf 0x00000002 (x86/x86-64)
194 - [ ] Using CPUID leaves 0x80000005-0x80000006 and 0x80000019 (AMD x86/x86-64)
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrAnalysis.h109 unsigned CPUID) const { in isZeroIdiom() argument
134 unsigned CPUID) const { in isDependencyBreaking() argument
135 return isZeroIdiom(MI, Mask, CPUID); in isDependencyBreaking()
145 unsigned CPUID) const { in isOptimizableRegisterMove() argument
/external/llvm-project/llvm/include/llvm/MC/
DMCInstrAnalysis.h109 unsigned CPUID) const { in isZeroIdiom() argument
134 unsigned CPUID) const { in isDependencyBreaking() argument
135 return isZeroIdiom(MI, Mask, CPUID); in isDependencyBreaking()
145 unsigned CPUID) const { in isOptimizableRegisterMove() argument
/external/mesa3d/src/mesa/x86/
Dcommon_x86_asm.S80 CPUID
103 CPUID
116 CPUID
130 CPUID
144 CPUID
/external/llvm-project/llvm/lib/MC/
DMCSchedule.cpp75 unsigned CPUID = getProcessorID(); in computeInstrLatency() local
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency()
121 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCSchedule.cpp75 unsigned CPUID = getProcessorID(); in computeInstrLatency() local
77 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency()
121 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local
123 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSubtargetInfo.inc13759 const MCInst *MI, unsigned CPUID) {
13762 if (CPUID == 2) { // CortexA53Model
13767 if (CPUID == 9) { // ThunderXT8XModel
13774 if (CPUID == 2) { // CortexA53Model
13779 if (CPUID == 9) { // ThunderXT8XModel
13786 if (CPUID == 4) { // ExynosM3Model
13797 if (CPUID == 5) { // ExynosM4Model
13808 if (CPUID == 6) { // ExynosM5Model
13821 if (CPUID == 1) { // CycloneModel
13826 if (CPUID == 5) { // ExynosM4Model
[all …]
/external/libjpeg-turbo/simd/i386/
Djsimdcpu.asm50 jz near .return ; CPUID is not supported
52 ; Check whether CPUID leaf 07H is supported
88 ; Check CPUID leaf 01H for MMX, SSE, and SSE2 support
/external/llvm-project/llvm/tools/llvm-mca/Views/
DInstructionInfoView.cpp102 unsigned CPUID = SM.getProcessorID(); in collectData() local
107 STI.resolveVariantSchedClass(SchedClassID, &Inst, &MCII, CPUID); in collectData()

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