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Searched refs:CPU_PLLDIV_CFG2 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/mediatek/mt8192/drivers/dcm/
Dmtk_dcm_utils.c298 ret &= ((mmio_read_32(CPU_PLLDIV_CFG2) & in dcm_mp_cpusys_top_cpu_pll_div_2_dcm_is_on()
309 mmio_clrsetbits_32(CPU_PLLDIV_CFG2, in dcm_mp_cpusys_top_cpu_pll_div_2_dcm()
314 mmio_clrsetbits_32(CPU_PLLDIV_CFG2, in dcm_mp_cpusys_top_cpu_pll_div_2_dcm()
Dmtk_dcm_utils.h22 #define CPU_PLLDIV_CFG2 (MP_CPUSYS_TOP_BASE + 0x22a8) macro