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Searched refs:CRL_APB_BASE (Results 1 – 1 of 1) sorted by relevance

/external/arm-trusted-firmware/plat/xilinx/zynqmp/include/
Dzynqmp_def.h48 #define CRL_APB_BASE U(0xFF5E0000) macro
49 #define CRL_APB_BOOT_MODE_USER (CRL_APB_BASE + 0x200)
50 #define CRL_APB_RESET_CTRL (CRL_APB_BASE + 0x218)
51 #define CRL_APB_RST_LPD_TOP (CRL_APB_BASE + 0x23C)
52 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + U(0x250))