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Searched refs:CRMU_IHOST_SW_PERSISTENT_REG10 (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/plat/brcm/common/
Dbrcm_mhu.c26 #define CPU_INTR_S_STAT CRMU_IHOST_SW_PERSISTENT_REG10
27 #define CPU_INTR_S_SET CRMU_IHOST_SW_PERSISTENT_REG10
28 #define CPU_INTR_S_CLEAR CRMU_IHOST_SW_PERSISTENT_REG10
/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dcrmu_def.h209 #define CRMU_IHOST_SW_PERSISTENT_REG10 (CRMU_CORE_BASE + 0x8c90) macro
/external/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dbl2_setup.c603 NOTICE("pr10: %x\n", mmio_read_32(CRMU_IHOST_SW_PERSISTENT_REG10)); in dump_persistent_regs()