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Searched refs:CS_AC_WRITE (Results 1 – 25 of 27) sorted by relevance

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/external/capstone/arch/AArch64/
DAArch64MappingInsnOp.inc3 { CS_AC_WRITE, CS_AC_READ, 0 }
7 { CS_AC_WRITE, CS_AC_READ, 0 }
11 { CS_AC_WRITE, CS_AC_READ, 0 }
15 { CS_AC_WRITE, CS_AC_READ, 0 }
19 { CS_AC_WRITE, CS_AC_READ, 0 }
23 { CS_AC_WRITE, CS_AC_READ, 0 }
27 { CS_AC_WRITE, CS_AC_READ, 0 }
31 { CS_AC_WRITE, CS_AC_READ, 0 }
35 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
39 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
[all …]
DARMMappingInsnOp.inc5 { CS_AC_WRITE, CS_AC_READ, 0 }
8 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
11 { CS_AC_WRITE, CS_AC_READ, 0 }
14 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
17 { CS_AC_WRITE, CS_AC_READ, 0 }
20 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
23 { CS_AC_WRITE, CS_AC_READ, 0 }
26 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
29 { CS_AC_WRITE, 0 }
32 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
[all …]
DAArch64Mapping.c1050 if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) { in AArch64_reg_access()
/external/capstone/arch/ARM/
DARMMappingInsnOp.inc5 { CS_AC_WRITE, CS_AC_READ, 0 }
8 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
11 { CS_AC_WRITE, CS_AC_READ, 0 }
14 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
17 { CS_AC_WRITE, CS_AC_READ, 0 }
20 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
23 { CS_AC_WRITE, CS_AC_READ, 0 }
26 { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
29 { CS_AC_WRITE, 0 }
32 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
[all …]
DARMMapping.c923 if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) { in ARM_reg_access()
DARMInstPrinter.c425 insn->detail->arm.operands[0].access = CS_AC_WRITE; in ARM_post_printer()
510 … MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_WRITE; in ARM_printInst()
572 … MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_WRITE; in ARM_printInst()
692 … MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_WRITE; in ARM_printInst()
750 …_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].access = CS_AC_READ | CS_AC_WRITE; in ARM_printInst()
/external/capstone/arch/X86/
DX86MappingInsnOp.inc26 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
30 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
34 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
38 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
42 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
46 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
50 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
54 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
58 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
62 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
[all …]
DX86MappingInsnOp_reduce.inc22 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
26 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
30 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
34 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
38 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
42 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
46 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
50 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
54 { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
58 { CS_AC_READ | CS_AC_WRITE, CS_AC_IGNORE, 0 }
[all …]
DX86Mapping.c2821 { X86_OUTSB, X86_REG_DX, CS_AC_WRITE },
2822 { X86_OUTSW, X86_REG_DX, CS_AC_WRITE },
2823 { X86_OUTSL, X86_REG_DX, CS_AC_WRITE },
2825 …{ X86_MOV8ao16, X86_REG_AL, CS_AC_WRITE }, // 16-bit A0 1020 // mov al, b…
2826 …{ X86_MOV8ao32, X86_REG_AL, CS_AC_WRITE }, // 32-bit A0 10203040 // mov al, b…
2827 …{ X86_MOV8ao64, X86_REG_AL, CS_AC_WRITE }, // 64-bit 66 A0 1020304050607080 // movabs al, b…
2829 …{ X86_MOV16ao16, X86_REG_AX, CS_AC_WRITE }, // 16-bit A1 1020 // mov ax, w…
2830 …{ X86_MOV16ao32, X86_REG_AX, CS_AC_WRITE }, // 32-bit A1 10203040 // mov ax, w…
2831 …{ X86_MOV16ao64, X86_REG_AX, CS_AC_WRITE }, // 64-bit 66 A1 1020304050607080 // movabs ax, w…
2833 …{ X86_MOV32ao16, X86_REG_EAX, CS_AC_WRITE }, // 32-bit 67 A1 1020 // mov eax, …
[all …]
/external/capstone/cstool/
Dcstool_arm64.c86 case CS_AC_WRITE: in print_insn_detail_arm64()
89 case CS_AC_READ | CS_AC_WRITE: in print_insn_detail_arm64()
Dcstool_arm.c83 case CS_AC_WRITE: in print_insn_detail_arm()
86 case CS_AC_READ | CS_AC_WRITE: in print_insn_detail_arm()
Dcstool_x86.c293 case CS_AC_WRITE: in print_insn_detail_x86()
296 case CS_AC_READ | CS_AC_WRITE: in print_insn_detail_x86()
/external/capstone/bindings/python/
Dtest_arm64.py80 elif i.access == CS_AC_WRITE:
82 elif i.access == CS_AC_READ | CS_AC_WRITE:
Dtest_arm.py80 elif i.access == CS_AC_WRITE:
82 elif i.access == CS_AC_READ | CS_AC_WRITE:
Dtest_x86.py240 elif i.access == CS_AC_WRITE:
242 elif i.access == CS_AC_READ | CS_AC_WRITE:
/external/capstone/suite/cstest/src/
Darm64_detail.c86 case CS_AC_WRITE: in get_detail_arm64()
89 case CS_AC_READ | CS_AC_WRITE: in get_detail_arm64()
Darm_detail.c83 case CS_AC_WRITE: in get_detail_arm()
86 case CS_AC_READ | CS_AC_WRITE: in get_detail_arm()
Dx86_detail.c296 case CS_AC_WRITE: in get_detail_x86()
299 case CS_AC_READ | CS_AC_WRITE: in get_detail_x86()
/external/capstone/bindings/java/
DTestX86.java6 import static capstone.Capstone.CS_AC_WRITE;
158 case CS_AC_WRITE: in print_ins_detail()
161 case CS_AC_READ | CS_AC_WRITE: in print_ins_detail()
/external/capstone/tests/
Dtest_arm64.c107 case CS_AC_WRITE: in print_insn_detail()
110 case CS_AC_READ | CS_AC_WRITE: in print_insn_detail()
Dtest_arm.c108 case CS_AC_WRITE: in print_insn_detail()
111 case CS_AC_READ | CS_AC_WRITE: in print_insn_detail()
Dtest_x86.c316 case CS_AC_WRITE: in print_insn_detail()
319 case CS_AC_READ | CS_AC_WRITE: in print_insn_detail()
/external/capstone/include/capstone/
Dcapstone.h206 CS_AC_WRITE = 1 << 1, ///< Operand write to memory or register. enumerator
/external/capstone/bindings/ocaml/
Dcapstone.ml72 (* It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE *)
/external/capstone/bindings/java/capstone/
DCapstone.java407 public static final int CS_AC_WRITE = 1 << 1; field in Capstone

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