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Searched refs:CTX (Results 1 – 25 of 56) sorted by relevance

123

/external/ms-tpm-20-ref/TPMCmd/tpm/src/crypt/ossl/
DTpmToOsslSupport.c66 BN_CTX *CTX = BN_CTX_new(); in OsslContextEnter() local
68 return OsslPushContext(CTX); in OsslContextEnter()
75 BN_CTX *CTX in OsslContextLeave() argument
78 OsslPopContext(CTX); in OsslContextLeave()
79 BN_CTX_free(CTX); in OsslContextLeave()
88 BN_CTX *CTX in OsslPushContext() argument
91 if(CTX == NULL) in OsslPushContext()
93 BN_CTX_start(CTX); in OsslPushContext()
94 return CTX; in OsslPushContext()
101 BN_CTX *CTX in OsslPopContext() argument
[all …]
DTpmToOsslMath.c171 BN_CTX *CTX in BnNewVariable() argument
178 if((CTX == NULL) || ((new = BN_CTX_get(CTX)) == NULL)) in BnNewVariable()
192 BIGNUM *osslTemp = BnNewVariable(CTX); in MathLibraryCompatibilityCheck()
237 VERIFY(BN_mul(bnTemp, bnOp1, bnOp2, CTX)); in BnModMult()
238 VERIFY(BN_div(NULL, bnResult, bnTemp, bnMod, CTX)); in BnModMult()
266 VERIFY(BN_mul(bnTemp, bnA, bnB, CTX)); in BnMult()
299 VERIFY(BN_div(bnQ, bnR, bnDend, bnSor, CTX)); in BnDiv()
334 VERIFY(BN_gcd(bnGcd, bn1, bn2, CTX)); in BnGcd()
365 VERIFY(BN_mod_exp(bnResult, bnN, bnE, bnM, CTX)); in BnModExp()
393 VERIFY(BN_mod_inverse(bnResult, bnN, bnM, CTX) != NULL); in BnModInverse()
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/external/tensorflow/tensorflow/core/framework/
Dop_requires.h41 #define OP_REQUIRES(CTX, EXP, STATUS) \ argument
44 CheckNotInComputeAsync((CTX), "OP_REQUIRES_ASYNC"); \
45 (CTX)->CtxFailure(__FILE__, __LINE__, (STATUS)); \
50 #define OP_REQUIRES_OK(CTX, ...) \ argument
54 CheckNotInComputeAsync((CTX), "OP_REQUIRES_OK_ASYNC"); \
55 (CTX)->CtxFailureWithWarning(__FILE__, __LINE__, _s); \
60 #define OP_REQUIRES_OK_OR_SET_PAYLOAD(CTX, PAYLOAD_KEY, PAYLOAD_VALUE, STATUS) \ argument
63 CheckNotInComputeAsync((CTX), "OP_REQUIRES_OK_ASYNC"); \
67 (CTX)->CtxFailureWithWarning(__FILE__, __LINE__, STATUS); \
72 #define OP_REQUIRES_ASYNC(CTX, EXP, STATUS, CALLBACK) \ argument
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUMachineModuleInfo.cpp22 LLVMContext &CTX = MMI.getModule()->getContext(); in AMDGPUMachineModuleInfo() local
23 AgentSSID = CTX.getOrInsertSyncScopeID("agent"); in AMDGPUMachineModuleInfo()
24 WorkgroupSSID = CTX.getOrInsertSyncScopeID("workgroup"); in AMDGPUMachineModuleInfo()
25 WavefrontSSID = CTX.getOrInsertSyncScopeID("wavefront"); in AMDGPUMachineModuleInfo()
27 CTX.getOrInsertSyncScopeID("one-as"); in AMDGPUMachineModuleInfo()
29 CTX.getOrInsertSyncScopeID("agent-one-as"); in AMDGPUMachineModuleInfo()
31 CTX.getOrInsertSyncScopeID("workgroup-one-as"); in AMDGPUMachineModuleInfo()
33 CTX.getOrInsertSyncScopeID("wavefront-one-as"); in AMDGPUMachineModuleInfo()
35 CTX.getOrInsertSyncScopeID("singlethread-one-as"); in AMDGPUMachineModuleInfo()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUMachineModuleInfo.cpp22 LLVMContext &CTX = MMI.getModule()->getContext(); in AMDGPUMachineModuleInfo() local
23 AgentSSID = CTX.getOrInsertSyncScopeID("agent"); in AMDGPUMachineModuleInfo()
24 WorkgroupSSID = CTX.getOrInsertSyncScopeID("workgroup"); in AMDGPUMachineModuleInfo()
25 WavefrontSSID = CTX.getOrInsertSyncScopeID("wavefront"); in AMDGPUMachineModuleInfo()
27 CTX.getOrInsertSyncScopeID("one-as"); in AMDGPUMachineModuleInfo()
29 CTX.getOrInsertSyncScopeID("agent-one-as"); in AMDGPUMachineModuleInfo()
31 CTX.getOrInsertSyncScopeID("workgroup-one-as"); in AMDGPUMachineModuleInfo()
33 CTX.getOrInsertSyncScopeID("wavefront-one-as"); in AMDGPUMachineModuleInfo()
35 CTX.getOrInsertSyncScopeID("singlethread-one-as"); in AMDGPUMachineModuleInfo()
/external/ms-tpm-20-ref/TPMCmd/tpm/include/Ossl/
DTpmToOsslMath.h83 BN_CTX *CTX; // the context for the math (this might not be member
95 #define OSSL_ENTER() BN_CTX *CTX = OsslContextEnter()
96 #define OSSL_LEAVE() OsslContextLeave(CTX)
106 #define ECC_ENTER() BN_CTX *CTX = OsslPushContext(E->CTX)
107 #define ECC_LEAVE() OsslPopContext(CTX)
109 #define BN_NEW() BnNewVariable(CTX)
/external/tensorflow/tensorflow/compiler/mlir/tools/kernel_gen/tests/
Dembed_tf_framework.mlir6 // CHECK-SAME: [[CTX:%.*]]: !tf_framework.op_kernel_context,
16 // CHECK-SAME: ([[CTX]], [[SIZE_0]], [[SIZE_2]]) : memref<?x10x?xf32>
17 // CHECK-NEXT: tf_framework.dealloc([[CTX]], [[VAL_3]]) : memref<?x10x?xf32>
44 // CHECK-SAME: [[CTX:%.*]]: !tf_framework.op_kernel_context
58 // CHECK: [[BUF_F32:%.*]] = tf_framework.alloc([[CTX]]) : memref<2xf32>
60 // CHECK: [[BUF_I32:%.*]] = tf_framework.alloc([[CTX]]) : memref<3xi32>
64 // CHECK: tf_framework.report_error [[CTX]], INVALID_ARGUMENT,
73 // CHECK-SAME: [[CTX:%.*]]: !tf_framework.op_kernel_context
90 // CHECK: [[BUF:%.*]] = tf_framework.alloc([[CTX]]) : memref<2xf32>
94 // CHECK: tf_framework.report_error [[CTX]], INVALID_ARGUMENT,
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/external/llvm-project/llvm/lib/DebugInfo/DWARF/
DDWARFDebugAranges.cpp46 void DWARFDebugAranges::generate(DWARFContext *CTX) { in generate() argument
48 if (!CTX) in generate()
52 DWARFDataExtractor ArangesData(CTX->getDWARFObj().getArangesSection(), in generate()
53 CTX->isLittleEndian(), 0); in generate()
54 extract(ArangesData, CTX->getRecoverableErrorHandler()); in generate()
59 for (const auto &CU : CTX->compile_units()) { in generate()
64 CTX->getRecoverableErrorHandler()(CURanges.takeError()); in generate()
/external/owasp/sanitizer/src/main/org/owasp/html/
DPolicyFactory.java86 public <CTX> HtmlSanitizer.Policy apply( in apply()
87 HtmlStreamEventReceiver out, @Nullable HtmlChangeListener<CTX> listener, in apply()
88 @Nullable CTX context) { in apply()
92 HtmlChangeReporter<CTX> r = new HtmlChangeReporter<CTX>( in apply()
116 public <CTX> String sanitize( in sanitize()
118 @Nullable HtmlChangeListener<CTX> listener, @Nullable CTX context) { in sanitize()
/external/ms-tpm-20-ref/TPMCmd/tpm/include/prototypes/
DTpmToOsslSupport_fp.h64 BN_CTX *CTX
73 BN_CTX *CTX
80 BN_CTX *CTX
/external/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/
DDWARFDebugAranges.cpp40 void DWARFDebugAranges::generate(DWARFContext *CTX) { in generate() argument
42 if (!CTX) in generate()
46 DataExtractor ArangesData(CTX->getDWARFObj().getArangesSection(), in generate()
47 CTX->isLittleEndian(), 0); in generate()
53 for (const auto &CU : CTX->compile_units()) { in generate()
/external/llvm/lib/DebugInfo/DWARF/
DDWARFDebugAranges.cpp38 void DWARFDebugAranges::generate(DWARFContext *CTX) { in generate() argument
40 if (!CTX) in generate()
44 DataExtractor ArangesData(CTX->getARangeSection(), CTX->isLittleEndian(), 0); in generate()
50 for (const auto &CU : CTX->compile_units()) { in generate()
/external/compiler-rt/lib/asan/scripts/
Dasan_device_setup406 CTX=u:object_r:system_file:s0
408 CTX=u:object_r:zygote_exec:s0
416 install "$TMPDIR/app_process32" /system/bin 755 $CTX
417 install "$TMPDIR/app_process32.real" /system/bin 755 $CTX
418 install "$TMPDIR/app_process64" /system/bin 755 $CTX
419 install "$TMPDIR/app_process64.real" /system/bin 755 $CTX
424 install "$TMPDIR/app_process32" /system/bin 755 $CTX
425 install "$TMPDIR/app_process.wrap" /system/bin 755 $CTX
426 install "$TMPDIR/asanwrapper" /system/bin 755 $CTX
433 adb_shell chcon $CTX /system/bin/sh-from-zygote
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp43 const MCContext &CTX; member in __anon85c674e80111::ARMMCCodeEmitter
48 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { in ARMMCCodeEmitter()
527 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
557 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
865 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
866 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
883 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
967 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue()
1004 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getT2AddrModeImm0_1020s4OpValue()
1072 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue()
[all …]
/external/llvm-project/compiler-rt/lib/asan/scripts/
Dasan_device_setup411 CTX=u:object_r:system_file:s0
413 CTX=u:object_r:zygote_exec:s0
421 install "$TMPDIR/app_process32" /system/bin 755 $CTX
422 install "$TMPDIR/app_process32.real" /system/bin 755 $CTX
423 install "$TMPDIR/app_process64" /system/bin 755 $CTX
424 install "$TMPDIR/app_process64.real" /system/bin 755 $CTX
434 install "$TMPDIR/app_process32" /system/bin 755 $CTX
435 install "$TMPDIR/app_process.wrap" /system/bin 755 $CTX
436 install "$TMPDIR/asanwrapper" /system/bin 755 $CTX
446 adb_shell chcon $CTX /system/bin/sh-from-zygote
/external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp52 MCContext &CTX; member in __anonb64162560111::ARMMCCodeEmitter
57 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { in ARMMCCodeEmitter()
557 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
595 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
930 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
931 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
983 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1062 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue()
1063 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue()
1082 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp52 MCContext &CTX; member in __anon5cae99ca0111::ARMMCCodeEmitter
57 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { in ARMMCCodeEmitter()
565 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
603 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
938 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
939 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
991 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1070 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue()
1071 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue()
1090 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue()
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/external/tensorflow/tensorflow/core/kernels/
Dconditional_accumulator_base.h165 #define OP_REQUIRES_BOOLEAN(CTX, EXP, STATUS) \ argument
168 (CTX)->CtxFailure(__FILE__, __LINE__, (STATUS)); \
173 #define OP_REQUIRES_OK_BOOLEAN(CTX, STATUS) \ argument
177 (CTX)->CtxFailureWithWarning(__FILE__, __LINE__, _s); \
/external/python/cpython3/Modules/_decimal/
D_decimal.c97 #undef CTX
109 #define CTX(v) (&((PyDecContextObject *)v)->ctx) macro
482 mpd_context_t *ctx = CTX(context); in dec_addstatus()
730 return PyLong_FromSsize_t(mpd_get##mem(CTX(self))); \
737 return PyLong_FromUnsignedLong(mpd_get##mem(CTX(self))); \
753 int i = mpd_getround(CTX(self)); in Dec_CONTEXT_GET_SSIZE()
769 return PyLong_FromLong(mpd_getcr(CTX(self))); in context_getallcr()
776 return PyLong_FromSsize_t(mpd_etiny(CTX(self))); in context_getetiny()
782 return PyLong_FromSsize_t(mpd_etop(CTX(self))); in context_getetop()
796 ctx = CTX(self); in context_setprec()
[all …]
/external/llvm-project/polly/test/ScopInfo/
Duser_context.ll2 …y -polly-scops -polly-context='[N] -> {: N = 1024}' -analyze < %s | FileCheck %s --check-prefix=CTX
15 ; CTX: Context:
16 ; CTX-NEXT: [N] -> { : N = 1024 }
/external/llvm-project/llvm/lib/Target/Lanai/
DLanaiMCInstLower.h31 LanaiMCInstLower(MCContext &CTX, AsmPrinter &AP) : Ctx(CTX), Printer(AP) {} in LanaiMCInstLower() argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiMCInstLower.h33 LanaiMCInstLower(MCContext &CTX, AsmPrinter &AP) : Ctx(CTX), Printer(AP) {} in LanaiMCInstLower() argument
/external/llvm/lib/Target/Lanai/
DLanaiMCInstLower.h34 LanaiMCInstLower(MCContext &CTX, Mangler &Mang, AsmPrinter &AP) in LanaiMCInstLower() argument
35 : Ctx(CTX), Printer(AP) {} in LanaiMCInstLower()
/external/python/cpython2/Modules/_ctypes/libffi/src/x86/
Dffi.c580 #define FFI_INIT_TRAMPOLINE_WIN64(TRAMP,FUN,CTX,MASK) \ argument
583 void* __ctx = (void*)(CTX); \
600 #define FFI_INIT_TRAMPOLINE(TRAMP,FUN,CTX) \ argument
603 unsigned int __ctx = (unsigned int)(CTX); \
611 #define FFI_INIT_TRAMPOLINE_RAW_THISCALL(TRAMP,FUN,CTX,SIZE) \ argument
614 unsigned int __ctx = (unsigned int)(CTX); \
638 #define FFI_INIT_TRAMPOLINE_STDCALL(TRAMP,FUN,CTX) \ argument
641 unsigned int __ctx = (unsigned int)(CTX); \
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.h27 const MCContext &CTX; variable
32 : MCII(mcii), CTX(ctx), in PPCMCCodeEmitter()

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