Searched refs:CTX_GPREG_X2 (Results 1 – 16 of 16) sorted by relevance
| /external/arm-trusted-firmware/lib/cpus/aarch64/ |
| D | wa_cve_2017_5715_bpiall.S | 27 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
325 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
339 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
343 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
347 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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| D | cortex_a76.S | 41 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
106 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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| D | neoverse_n1.S | 651 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| D | mce.c | 208 write_ctx_reg(gp_regs, CTX_GPREG_X2, (ret64)); in mce_command_handler()
251 write_ctx_reg(gp_regs, CTX_GPREG_X2, ((ret64 == arg0) ? in mce_command_handler()
265 write_ctx_reg(gp_regs, CTX_GPREG_X2, (ret64 >> 32ULL)); in mce_command_handler()
298 write_ctx_reg(gp_regs, CTX_GPREG_X2, (arg1)); in mce_command_handler()
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | smccc_helpers.h | 31 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X2), (_x2)); \
80 _x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
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| /external/arm-trusted-firmware/bl31/aarch64/ |
| D | ea_delegate.S | 67 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
113 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/ |
| D | plat_sip_calls.c | 69 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X2, per[1]); in plat_sip_handler()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_fiq_glue.c | 143 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X2), (val)); in tegra_fiq_get_intr_context()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| D | plat_sip_calls.c | 148 CTX_GPREG_X2, (ref_clk_ctr)); in plat_sip_handler()
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| /external/arm-trusted-firmware/services/std_svc/spmd/ |
| D | spmd_pm.c | 23 write_ctx_reg(gpregs, CTX_GPREG_X2, FFA_PARAM_MBZ); in spmd_build_spmc_message()
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| /external/arm-trusted-firmware/include/lib/el3_runtime/aarch64/ |
| D | context.h | 19 #define CTX_GPREG_X2 U(0x10) macro
491 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2, x2); \
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| /external/arm-trusted-firmware/services/std_svc/spm_mm/ |
| D | spm_mm_main.c | 200 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X2, x2); in spm_mm_sp_call()
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| /external/arm-trusted-firmware/plat/qti/qtiseclib/src/ |
| D | qtiseclib_cb_interface.c | 148 qti_ns_ctx->x2 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2); in qtiseclib_cb_get_ns_ctx()
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| /external/arm-trusted-firmware/docs/security_advisories/ |
| D | security-advisory-tfv-8.rst | 50 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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| /external/arm-trusted-firmware/services/std_svc/sdei/ |
| D | sdei_intr_mgmt.c | 256 SMC_SET_GP(ctx, CTX_GPREG_X2, disp_ctx->elr_el3); in setup_ns_dispatch()
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| /external/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
| D | context.S | 748 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
873 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
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