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Searched refs:ConstraintID (Results 1 – 25 of 64) sorted by relevance

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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelDAGToDAG.cpp59 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
98 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
99 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyISelDAGToDAG.cpp61 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
199 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
200 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelDAGToDAG.cpp66 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
219 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
220 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelDAGToDAG.cpp49 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
174 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
175 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm/lib/Target/Mips/
DMipsISelDAGToDAG.cpp238 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
241 switch(ConstraintID) { in SelectInlineAsmMemoryOperand()
DMipsISelDAGToDAG.h130 unsigned ConstraintID,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp67 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
111 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
114 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp67 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
111 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
114 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp67 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
111 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
114 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DInlineAsmLowering.cpp377 unsigned ConstraintID = in lowerInlineAsm() local
379 assert(ConstraintID != InlineAsm::Constraint_Unknown && in lowerInlineAsm()
385 OpFlags = InlineAsm::getFlagWordForMem(OpFlags, ConstraintID); in lowerInlineAsm()
519 unsigned ConstraintID = in lowerInlineAsm() local
522 OpFlags = InlineAsm::getFlagWordForMem(OpFlags, ConstraintID); in lowerInlineAsm()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp104 unsigned ConstraintID = InlineAsm::getMemoryConstraintID(MO.getImm()); in getLoadStoreOffsetSizeInBits() local
105 switch (ConstraintID) { in getLoadStoreOffsetSizeInBits()
DMipsISelDAGToDAG.cpp311 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
314 switch(ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp104 unsigned ConstraintID = InlineAsm::getMemoryConstraintID(MO.getImm()); in getLoadStoreOffsetSizeInBits() local
105 switch (ConstraintID) { in getLoadStoreOffsetSizeInBits()
DMipsISelDAGToDAG.cpp311 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
314 switch(ConstraintID) { in SelectInlineAsmMemoryOperand()
DMipsISelDAGToDAG.h145 unsigned ConstraintID,
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVISelDAGToDAG.h43 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp52 unsigned ConstraintID,
378 unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
381 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp52 unsigned ConstraintID,
378 unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
381 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp53 unsigned ConstraintID,
389 unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
392 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp106 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
283 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
286 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp106 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
282 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
285 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm-project/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp106 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
282 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID, in SelectInlineAsmMemoryOperand() argument
285 switch (ConstraintID) { in SelectInlineAsmMemoryOperand()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.h50 unsigned ConstraintID,
/external/llvm-project/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.h52 unsigned ConstraintID,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.h52 unsigned ConstraintID,

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