| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineMulDivRem.cpp | 1227 bool Cvt = FpVal.getExactInverse(&Reciprocal); in CvtFDivConstToReciprocal() local
1229 if (!Cvt && AllowReciprocal && FpVal.isFiniteNonZero()) { in CvtFDivConstToReciprocal()
1232 Cvt = !Reciprocal.isDenormal(); in CvtFDivConstToReciprocal()
1235 if (!Cvt) in CvtFDivConstToReciprocal()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4837 SDValue Cvt = DAG.getNode(AMDGPUISD::CVT_PKRTZ_F16_F32, SL, MVT::i32, in ReplaceNodeResults() local
4839 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2f16, Cvt)); in ReplaceNodeResults()
4864 SDValue Cvt = DAG.getNode(Opcode, SL, MVT::i32, Src0, Src1); in ReplaceNodeResults() local
4865 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, Cvt)); in ReplaceNodeResults()
7979 SDValue Cvt = NewLoad; in widenLoad() local
7981 Cvt = DAG.getNode(ISD::SIGN_EXTEND_INREG, SL, MVT::i32, NewLoad, in widenLoad()
7985 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad()
7993 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
7997 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()
7998 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4292 SDValue Cvt = DAG.getNode(AMDGPUISD::CVT_PKRTZ_F16_F32, SL, MVT::i32, in ReplaceNodeResults() local
4294 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2f16, Cvt)); in ReplaceNodeResults()
4319 SDValue Cvt = DAG.getNode(Opcode, SL, MVT::i32, Src0, Src1); in ReplaceNodeResults() local
4320 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, Cvt)); in ReplaceNodeResults()
7317 SDValue Cvt = NewLoad; in widenLoad() local
7319 Cvt = DAG.getNode(ISD::SIGN_EXTEND_INREG, SL, MVT::i32, NewLoad, in widenLoad()
7323 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad()
7331 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
7335 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()
7336 DCI.AddToWorklist(Cvt.getNode()); in widenLoad()
[all …]
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX86BaseImpl.h | 3053 _cvt(T, Src0RM, Traits::Insts::Cvt::Float2float);
3063 _cvt(T, Src0R, Traits::Insts::Cvt::Tps2dq);
3084 _cvt(T_1, Src0RM, Traits::Insts::Cvt::Tss2si);
3114 _cvt(T_1, Src0RM, Traits::Insts::Cvt::Tss2si);
3127 _cvt(T, Src0R, Traits::Insts::Cvt::Dq2ps);
3147 _cvt(T_2, T_1, Traits::Insts::Cvt::Si2ss);
3175 _cvt(T_2, T_1, Traits::Insts::Cvt::Si2ss);
4668 _cvt(T, Src0R, Traits::Insts::Cvt::Ps2dq);
4689 _cvt(T_1, Src0RM, Traits::Insts::Cvt::Ss2si);
|
| D | IceTargetLoweringX86Base.h | 629 typename Traits::Insts::Cvt::CvtVariant Variant) { in _cvt()
631 Context.insert<typename Traits::Insts::Cvt>(Dest, Src0, Variant); in _cvt()
|
| D | IceInstX86Base.h | 97 Cvt, enumerator
2593 return InstX86Base::isClassof(Instr, InstX86Base::Cvt); in classof()
3287 using Cvt = typename InstImpl<TraitsType>::InstX86Cvt; member
|
| D | IceInstX86BaseImpl.h | 248 : InstX86Base(Func, InstX86Base::Cvt, 1, Dest), Variant(Variant) { in InstX86Cvt()
|
| /external/llvm-project/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 2319 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u32_u16, DL, in tryStoreParam() local
2321 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
2328 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_s32_s16, DL, in tryStoreParam() local
2330 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 2320 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u32_u16, DL, in tryStoreParam() local
2322 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
2329 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_s32_s16, DL, in tryStoreParam() local
2331 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 3108 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_u32_u16, DL, in tryStoreParam() local
3110 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
3117 SDNode *Cvt = CurDAG->getMachineNode(NVPTX::CVT_s32_s16, DL, in tryStoreParam() local
3119 Ops[0] = SDValue(Cvt, 0); in tryStoreParam()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2432 SDValue Cvt = DAG.getNode(AMDGPUISD::CVT_F32_UBYTE0, DL, VT, Src); in performUCharToFloatCombine() local
2433 DCI.AddToWorklist(Cvt.getNode()); in performUCharToFloatCombine()
2434 return Cvt; in performUCharToFloatCombine()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5785 SDValue Cvt = DAG.getNode(ARMISD::VMOVrh, SDLoc(Op), MVT::i32, Op); in ExpandBITCAST() local
5786 DAG.ReplaceAllUsesWith(*ZeroExtend, &Cvt); in ExpandBITCAST()
5787 return Cvt; in ExpandBITCAST()
5812 SDValue Cvt; in ExpandBITCAST() local
5815 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
5819 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
5822 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 19760 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64() local
19763 return DAG.getMergeValues({Cvt, Chain}, DL); in lowerINT_TO_FP_vXi64()
19765 return Cvt; in lowerINT_TO_FP_vXi64()
30376 SDValue Cvt = DAG.getSelect(dl, MVT::v4f32, IsNeg, Slow, SignCvt); in ReplaceNodeResults() local
30377 Results.push_back(Cvt); in ReplaceNodeResults()
49585 SDValue Cvt, Chain; in combineFP_EXTEND() local
49587 Cvt = DAG.getNode(X86ISD::STRICT_CVTPH2PS, dl, {CvtVT, MVT::Other}, in combineFP_EXTEND()
49589 Chain = Cvt.getValue(1); in combineFP_EXTEND()
49591 Cvt = DAG.getNode(X86ISD::CVTPH2PS, dl, CvtVT, Src); in combineFP_EXTEND()
49596 Cvt = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v2f32, Cvt, in combineFP_EXTEND()
[all …]
|
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | XmmArith.cpp | 1424 TEST_F(AssemblerX8664Test, Cvt) { in TEST_F() argument
|
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | XmmArith.cpp | 1350 TEST_F(AssemblerX8632Test, Cvt) { in TEST_F() argument
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4484 SDValue Cvt; in ExpandBITCAST() local
4487 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
4491 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
4494 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6001 SDValue Cvt; in ExpandBITCAST() local
6004 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6008 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6011 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18766 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64() local
18769 return DAG.getMergeValues({Cvt, Chain}, DL); in lowerINT_TO_FP_vXi64()
18771 return Cvt; in lowerINT_TO_FP_vXi64()
29208 SDValue Cvt = DAG.getSelect(dl, MVT::v4f32, IsNeg, Slow, SignCvt); in ReplaceNodeResults() local
29209 Results.push_back(Cvt); in ReplaceNodeResults()
|