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/external/OpenCSD/decoder/tests/snapshots/TC2/pkt_proc_logs/
Dtrc_pkt_lister_0x13.ppl24 …D:13; TIMESTAMP : Timestamp packet; TS=0x00000082F9D18BCC ~[0x82F9D18BCC](562537008076); Cycles=0;
25 Idx:26590; ID:13; ATOM : Atom packet; E; Cycles=522;
26 Idx:26593; ID:13; ATOM : Atom packet; N; Cycles=23;
27 Idx:26595; ID:13; ATOM : Atom packet; E; Cycles=15;
28 … : Instruction Synchronisation packet; (Trace Enable); Addr=0xc0018dde; S; ISA=Thumb2; Cycles=51;
29 Idx:26604; ID:13; ATOM : Atom packet; E; Cycles=1;
30 …: Instruction Synchronisation packet; (Trace Enable); Addr=0xc0018de4; S; ISA=Thumb2; Cycles=121;
31 Idx:26614; ID:13; ATOM : Atom packet; E; Cycles=1;
32 Idx:26615; ID:13; ATOM : Atom packet; N; Cycles=16;
33 Idx:26617; ID:13; ATOM : Atom packet; E; Cycles=3;
[all …]
Dtrc_pkt_lister-dcd-0x13.ppl35 …00 ]; TIMESTAMP : Timestamp packet; TS=0x00000082F9D18BCC ~[0x82F9D18BCC](562537008076); Cycles=0;
37 Idx:26590; ID:13; [0xe8 0x20 ]; ATOM : Atom packet; E; Cycles=522;
39 Idx:26593; ID:13; [0xde 0x01 ]; ATOM : Atom packet; N; Cycles=23;
41 Idx:26595; ID:13; [0xbc ]; ATOM : Atom packet; E; Cycles=15;
43 … : Instruction Synchronisation packet; (Trace Enable); Addr=0xc0018dde; S; ISA=Thumb2; Cycles=51;
45 Idx:26604; ID:13; [0x84 ]; ATOM : Atom packet; E; Cycles=1;
47 …: Instruction Synchronisation packet; (Trace Enable); Addr=0xc0018de4; S; ISA=Thumb2; Cycles=121;
49 Idx:26614; ID:13; [0x84 ]; ATOM : Atom packet; E; Cycles=1;
51 Idx:26615; ID:13; [0xc2 0x01 ]; ATOM : Atom packet; N; Cycles=16;
53 Idx:26617; ID:13; [0x8c ]; ATOM : Atom packet; E; Cycles=3;
[all …]
/external/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
46 VisitedBBInfo() : HasReturn(false), Cycles(0) {} in VisitedBBInfo()
47 VisitedBBInfo(bool HasReturn, unsigned int Cycles) in VisitedBBInfo()
48 : HasReturn(HasReturn), Cycles(Cycles) {} in VisitedBBInfo()
69 unsigned int Cycles = 0);
72 unsigned int &Cycles);
122 unsigned int Cycles = 0; in runOnMachineFunction() local
128 Cycles = I->second; in runOnMachineFunction()
130 if (Cycles < Threshold) { in runOnMachineFunction()
142 addPadding(MBB, ReturnLoc, Threshold - Cycles); in runOnMachineFunction()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
46 VisitedBBInfo() : HasReturn(false), Cycles(0) {} in VisitedBBInfo()
47 VisitedBBInfo(bool HasReturn, unsigned int Cycles) in VisitedBBInfo()
48 : HasReturn(HasReturn), Cycles(Cycles) {} in VisitedBBInfo()
75 unsigned int Cycles = 0);
78 unsigned int &Cycles);
134 unsigned Cycles = I->second; in runOnMachineFunction() local
141 if (Cycles < Threshold) { in runOnMachineFunction()
153 addPadding(MBB, ReturnLoc, Threshold - Cycles); in runOnMachineFunction()
164 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) { in findReturns() argument
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86PadShortFunction.cpp44 unsigned int Cycles; member
46 VisitedBBInfo() : HasReturn(false), Cycles(0) {} in VisitedBBInfo()
47 VisitedBBInfo(bool HasReturn, unsigned int Cycles) in VisitedBBInfo()
48 : HasReturn(HasReturn), Cycles(Cycles) {} in VisitedBBInfo()
76 unsigned int Cycles = 0);
79 unsigned int &Cycles);
135 unsigned Cycles = I->second; in runOnMachineFunction() local
142 if (Cycles < Threshold) { in runOnMachineFunction()
154 addPadding(MBB, ReturnLoc, Threshold - Cycles); in runOnMachineFunction()
165 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) { in findReturns() argument
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/external/llvm/include/llvm/MC/
DMCSchedule.h57 unsigned Cycles; member
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
70 int Cycles; member
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
89 int Cycles; member
93 && Cycles == Other.Cycles;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DInstruction.cpp22 unsigned Cycles) { in writeStartEvent() argument
25 CRD.Cycles = Cycles; in writeStartEvent()
26 DependentWriteCyclesLeft = Cycles; in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { in writeStartEvent() argument
40 if (TotalCycles < Cycles) { in writeStartEvent()
43 CRD.Cycles = Cycles; in writeStartEvent()
44 TotalCycles = Cycles; in writeStartEvent()
139 if (CriticalRegDep.Cycles) in computeCriticalRegDep()
145 if (WriteCRD.Cycles > MaxLatency) in computeCriticalRegDep()
151 if (ReadCRD.Cycles > MaxLatency) in computeCriticalRegDep()
DPipeline.cpp45 ++Cycles; in run()
48 return Cycles; in run()
86 LLVM_DEBUG(dbgs() << "\n[E] Cycle begin: " << Cycles << '\n'); in notifyCycleBegin()
92 LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n"); in notifyCycleEnd()
/external/llvm-project/llvm/lib/MCA/
DInstruction.cpp22 unsigned Cycles) { in writeStartEvent() argument
25 CRD.Cycles = Cycles; in writeStartEvent()
26 DependentWriteCyclesLeft = Cycles; in writeStartEvent()
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { in writeStartEvent() argument
40 if (TotalCycles < Cycles) { in writeStartEvent()
43 CRD.Cycles = Cycles; in writeStartEvent()
44 TotalCycles = Cycles; in writeStartEvent()
139 if (CriticalRegDep.Cycles) in computeCriticalRegDep()
145 if (WriteCRD.Cycles > MaxLatency) in computeCriticalRegDep()
151 if (ReadCRD.Cycles > MaxLatency) in computeCriticalRegDep()
DPipeline.cpp45 ++Cycles; in run()
48 return Cycles; in run()
86 LLVM_DEBUG(dbgs() << "\n[E] Cycle begin: " << Cycles << '\n'); in notifyCycleBegin()
92 LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n"); in notifyCycleEnd()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCSchedule.h66 uint16_t Cycles; member
69 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
79 int16_t Cycles; member
83 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
98 int Cycles; member
102 && Cycles == Other.Cycles;
/external/llvm-project/llvm/include/llvm/MC/
DMCSchedule.h66 uint16_t Cycles; member
69 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
79 int16_t Cycles; member
83 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
98 int Cycles; member
102 && Cycles == Other.Cycles;
/external/dagger2/javatests/dagger/functional/cycle/
DCycleTest.java21 import dagger.functional.cycle.Cycles.A;
22 import dagger.functional.cycle.Cycles.BindsCycleComponent;
23 import dagger.functional.cycle.Cycles.C;
24 import dagger.functional.cycle.Cycles.ChildCycleComponent;
25 import dagger.functional.cycle.Cycles.CycleComponent;
26 import dagger.functional.cycle.Cycles.CycleMapComponent;
27 import dagger.functional.cycle.Cycles.S;
28 import dagger.functional.cycle.Cycles.SelfCycleComponent;
/external/llvm-project/llvm/lib/MC/
DMCSchedule.cpp49 if (WLEntry->Cycles < 0) in computeInstrLatency()
50 return WLEntry->Cycles; in computeInstrLatency()
51 Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles)); in computeInstrLatency()
95 if (!I->Cycles) in getReciprocalThroughput()
98 double Temp = NumUnits * 1.0 / I->Cycles; in getReciprocalThroughput()
163 DelayCycles = std::min(DelayCycles, E.Cycles); in getForwardingDelayCycles()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCSchedule.cpp49 if (WLEntry->Cycles < 0) in computeInstrLatency()
50 return WLEntry->Cycles; in computeInstrLatency()
51 Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles)); in computeInstrLatency()
95 if (!I->Cycles) in getReciprocalThroughput()
98 double Temp = NumUnits * 1.0 / I->Cycles; in getReciprocalThroughput()
163 DelayCycles = std::min(DelayCycles, E.Cycles); in getForwardingDelayCycles()
/external/llvm-project/llvm/tools/llvm-mca/Views/
DTimelineView.cpp22 unsigned Cycles) in TimelineView() argument
24 MaxCycle(Cycles == 0 ? 80 : Cycles), LastCycle(0), WaitTime(S.size()), in TimelineView()
119 static void tryChangeColor(raw_ostream &OS, unsigned Cycles, in tryChangeColor() argument
124 raw_ostream::Colors Color = chooseColor(Cycles, Executions, BufferSize); in tryChangeColor()
253 static void printTimelineHeader(formatted_raw_ostream &OS, unsigned Cycles) { in printTimelineHeader() argument
255 if (Cycles >= 10) { in printTimelineHeader()
257 for (unsigned I = 0; I <= Cycles; ++I) { in printTimelineHeader()
268 for (unsigned I = 0; I <= Cycles; ++I) { in printTimelineHeader()
/external/llvm-project/llvm/test/tools/llvm-mca/X86/
Duop-queue.s19 # BTVER2-DEC-2-NEXT: Total Cycles: 3003
29 # BTVER2-DEC-1-NEXT: Total Cycles: 6003
34 # BTVER2-UOPQ-1-NEXT: Total Cycles: 6003
39 # BTVER2-UOPQ-2-NEXT: Total Cycles: 3003
44 # HASWELL-DEC-2-NEXT: Total Cycles: 3003
49 # HASWELL-UOPQ-1-NEXT: Total Cycles: 6003
54 # HASWELL-UOPQ-2-NEXT: Total Cycles: 3003
59 # HASWELL-UOPQ-3-NEXT: Total Cycles: 2003
64 # HASWELL-UOPQ-4-NEXT: Total Cycles: 1503
Dread-after-ld-1.s18 # BARCELONA-NEXT: Total Cycles: 20
21 # BDVER2-NEXT: Total Cycles: 17
24 # BDWELL-NEXT: Total Cycles: 17
27 # BTVER2-NEXT: Total Cycles: 25
30 # HASWELL-NEXT: Total Cycles: 19
33 # SANDY-NEXT: Total Cycles: 20
36 # SKYLAKE-NEXT: Total Cycles: 18
39 # ZNVER1-NEXT: Total Cycles: 20
42 # ZNVER2-NEXT: Total Cycles: 21
Dvariable-blend-read-after-ld-2.s26 # BDVER2-NEXT: Total Cycles: 10
29 # BDWELL-NEXT: Total Cycles: 10
32 # BTVER2-NEXT: Total Cycles: 11
35 # HASWELL-NEXT: Total Cycles: 11
38 # IVY-NEXT: Total Cycles: 11
41 # SANDY-NEXT: Total Cycles: 11
44 # SKYLAKE-NEXT: Total Cycles: 11
47 # ZNVER1-NEXT: Total Cycles: 11
50 # ZNVER2-NEXT: Total Cycles: 11
Dvariable-blend-read-after-ld-1.s26 # BDVER2-NEXT: Total Cycles: 10
29 # BDWELL-NEXT: Total Cycles: 10
32 # BTVER2-NEXT: Total Cycles: 11
35 # HASWELL-NEXT: Total Cycles: 11
38 # IVY-NEXT: Total Cycles: 11
41 # SANDY-NEXT: Total Cycles: 11
44 # SKYLAKE-NEXT: Total Cycles: 11
47 # ZNVER1-NEXT: Total Cycles: 11
50 # ZNVER2-NEXT: Total Cycles: 11
Dbextr-read-after-ld.s16 # BDVER2-NEXT: Total Cycles: 9
19 # BDWELL-NEXT: Total Cycles: 10
22 # BTVER2-NEXT: Total Cycles: 7
25 # HASWELL-NEXT: Total Cycles: 10
28 # SKYLAKE-NEXT: Total Cycles: 10
31 # ZNVER1-NEXT: Total Cycles: 8
34 # ZNVER2-NEXT: Total Cycles: 8
/external/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
DLSUnit.h122 unsigned Cycles = IR.getInstruction()->getCyclesLeft(); in onGroupIssued() local
123 if (CriticalPredecessor.Cycles < Cycles) { in onGroupIssued()
125 CriticalPredecessor.Cycles = Cycles; in onGroupIssued()
182 if (isWaiting() && CriticalPredecessor.Cycles) in cycleEvent()
183 CriticalPredecessor.Cycles--; in cycleEvent()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/HardwareUnits/
DLSUnit.h107 unsigned Cycles = IR.getInstruction()->getCyclesLeft(); in onGroupIssued() local
108 if (CriticalPredecessor.Cycles < Cycles) { in onGroupIssued()
110 CriticalPredecessor.Cycles = Cycles; in onGroupIssued()
161 if (isWaiting() && CriticalPredecessor.Cycles) in cycleEvent()
162 CriticalPredecessor.Cycles--; in cycleEvent()
/external/llvm-project/llvm/lib/CodeGen/
DEarlyIfConversion.cpp802 struct Cycles { struct
806 template <typename Remark> Remark &operator<<(Remark &R, Cycles C) { in operator <<()
849 << Cycles{"ResLength", ResLength} in shouldConvertIf()
851 << Cycles{"MinCrit", MinCrit} << ") by more than the threshold of " in shouldConvertIf()
852 << Cycles{"CritLimit", CritLimit} in shouldConvertIf()
935 << Cycles{"CondCycles", Cond.Extra} << " to the critical path"; in shouldConvertIf()
938 << Cycles{"ShortCycles", Short.Extra}; in shouldConvertIf()
941 << Cycles{"LongCycles", Long.Extra}; in shouldConvertIf()
943 << Cycles{"CritLimit", CritLimit} << "."; in shouldConvertIf()
951 << Cycles{"CondCycles", Cond.Extra} << " to the critical path"; in shouldConvertIf()
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/external/llvm-project/llvm/lib/MCA/Stages/
DInstructionTables.cpp32 unsigned Cycles = Resource.second.size(); in execute() local
42 std::make_pair(ResourceUnit, ResourceCycles(Cycles, NumUnits))); in execute()
57 ResourceUnit, ResourceCycles(Cycles, NumUnits * SubUnit.NumUnits))); in execute()

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