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/external/libhevc/common/arm/
Dihevc_sao_band_offset_chroma.s132 VLD1.8 D30,[r7] @pi1_sao_offset_u load
135 VDUP.8 D29,D30[1] @vdup_n_u8(pi1_sao_offset_u[1])
138 VDUP.8 D28,D30[2] @vdup_n_u8(pi1_sao_offset_u[2])
141 VDUP.8 D27,D30[3] @vdup_n_u8(pi1_sao_offset_u[3])
145 VDUP.8 D26,D30[4] @vdup_n_u8(pi1_sao_offset_u[4])
150 VMOV.I8 D30,#16 @vdup_n_u8(16)
166 VCLE.U8 D13,D4,D30 @vcle_u8(band_table.val[3], vdup_n_u8(16))
175 VCLE.U8 D14,D3,D30 @vcle_u8(band_table.val[2], vdup_n_u8(16))
185 VCLE.U8 D15,D2,D30 @vcle_u8(band_table.val[1], vdup_n_u8(16))
195 VCLE.U8 D16,D1,D30 @vcle_u8(band_table.val[0], vdup_n_u8(16))
[all …]
Dihevc_sao_edge_offset_class1.s140 VLD1.8 D30,[r12]! @vld1q_u8(pu1_src[(ht - 1) * src_strd])
158 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
222 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
258 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
284 VLD1.8 D30,[r12] @vld1_u8(pu1_src[(ht - 1) * src_strd])
285 VST1.8 {D30},[r3] @vst1_u8(pu1_src_top[col])
300 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
341 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
344 VST1.8 {D30},[r10],r1 @II vst1q_u8(pu1_src_cpy, pu1_cur_row)
370 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
[all …]
Dihevc_sao_edge_offset_class1_chroma.s144 VLD1.8 D30,[r12]! @vld1q_u8(pu1_src[(ht - 1) * src_strd])
162 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
234 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
275 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
301 VLD1.8 D30,[r12] @vld1_u8(pu1_src[(ht - 1) * src_strd])
302 VST1.8 {D30},[r3] @vst1_u8(pu1_src_top[col])
317 VLD1.8 D30,[r6]! @II pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
371 VMOVN.I16 D30,Q13 @II vmovn_s16(pi2_tmp_cur_row.val[0])
374 VST1.8 {D30},[r10],r1 @II vst1q_u8(pu1_src_cpy, pu1_cur_row)
405 VMOVN.I16 D30,Q13 @vmovn_s16(pi2_tmp_cur_row.val[0])
[all …]
Dihevc_sao_band_offset_luma.s124 VLD1.8 D30,[r6] @pi1_sao_offset load
127 VDUP.8 D29,D30[1] @vdup_n_u8(pi1_sao_offset[1])
130 VDUP.8 D28,D30[2] @vdup_n_u8(pi1_sao_offset[2])
133 VDUP.8 D27,D30[3] @vdup_n_u8(pi1_sao_offset[3])
136 VDUP.8 D26,D30[4] @vdup_n_u8(pi1_sao_offset[4])
Dihevc_resi_trans_32x32_a9q.s127 VLD1.S32 D30[0],[R9],R12
128 VLD1.S32 D30[1],[R9],R12 @ D30 - [0 0] [0 1] [8 0] [8 1]
132 VTRN.S32 D30,D31 @ D30 - [0 0] [0 1] [16 0] [16 1]
133 VTRN.S16 D30,D31 @ D31 - [8 0] [8 1] [24 0] [24 1]
134 VST1.S16 {D30,D31},[SP]
197 VADDW.S16 Q14,Q14,D30
362 VST1.32 D30,[R2],R10
397 VSWP D30,D27 @ R2
466 VSWP D30,D17 @ R2
833 VLD1.S32 D30,[R9],R12 @ D30: [16 0] [16 1]
Dihevc_sao_edge_offset_class0_chroma.s167 VLD1.8 D30,[r12]! @II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
256 …VMOVL.U8 Q14,D30 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u…
330 VLD1.8 D30,[r12]! @II pu1_cur_row = vld1q_u8(pu1_src_cpy)
395 …VMOVL.U8 Q12,D30 @II pi2_tmp_cur_row.val[0] = vreinterpretq_s16_u16(vmovl_u…
Dihevc_sao_edge_offset_class2_chroma.s411 VLD1.8 D30,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
420 VTBL.8 D18,{D30},D18 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
423 VTBL.8 D19,{D30},D19 @I vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
457 VLD1.8 D30,[r11]! @III pu1_next_row = vld1q_u8(pu1_src_cpy + src_strd)
624 VLD1.8 D30,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
644 VTBL.8 D26,{D30},D26 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
645 VTBL.8 D27,{D30},D27 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
Dihevc_sao_edge_offset_class0.s237 VTBL.8 D30,{D11},D28 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
245 …VADDW.S8 Q0,Q0,D30 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[…
/external/libhevc/decoder/arm/
Dihevcd_fmt_conv_420sp_to_rgba8888.s167 VLD2.8 {D30,D31},[R0]! @//D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row 1
219 VADDW.U8 Q7,Q4,D30 @//Q7 - HAS Y + B
220 VADDW.U8 Q8,Q5,D30 @//Q8 - HAS Y + R
221 VADDW.U8 Q9,Q6,D30 @//Q9 - HAS Y + G
270 VLD2.8 {D30,D31},[R0]! @//D0 - Y0,Y2,Y4,Y6,Y8,Y10,Y12,Y14 row 1
350 VADDW.U8 Q7,Q4,D30 @//Q7 - HAS Y + B
351 VADDW.U8 Q8,Q5,D30 @//Q8 - HAS Y + R
352 VADDW.U8 Q9,Q6,D30 @//Q9 - HAS Y + G
/external/libxaac/decoder/armv7/
Dixheaacd_post_twiddle_overlap.s303 VUZP.16 D30, D31
306 VMULL.U16 Q2, D30, D12
371 VMULL.S32 Q11, D30, D0
377 VMULL.S32 Q4, D30, D0
441 VUZP.16 D30, D31
446 VMOV D23, D30
559 VUZP.16 D30, D31
562 VMULL.U16 Q2, D30, D12
628 VMULL.S32 Q11, D30, D0
636 VMULL.S32 Q4, D30, D0
[all …]
Dixheaacd_dct3_32.s242 VST1.32 D30[0], [R8]!
251 VST1.32 D30[1], [R8]!
293 VSUB.I32 D12, D10, D30
296 VADD.I32 D10, D10, D30
Dia_xheaacd_mps_reoder_mulshift_acc.s181 VADD.I64 D30, D30, D24
/external/harfbuzz_ng/test/shaping/data/in-house/tests/
Dindic-pref-blocking.tests1 ../fonts/226bc2deab3846f1a682085f70c67d0421014144.ttf::U+0D2F,U+0D4D,U+0D30,U+0D46:[evowelsignmlym=…
2 ../fonts/e207635780b42f898d58654b65098763e340f5c7.ttf::U+0D2F,U+0D4D,U+0D30,U+0D46:[yamlym=0+2120|v…
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Disel-zext-vNi1.ll46 ; CHECK-DAG: r[[D30:([0-9]+:[0-9]+)]] = CONST64(#281479271743489)
49 ; CHECK: r1:0 = and(r[[D31]],r[[D30]])
/external/llvm-project/llvm/test/MC/MachO/
Dx86_64-symbols.s95 D30: label
Dx86_32-symbols.s95 D30: label
/external/llvm/test/MC/MachO/
Dx86_64-symbols.s95 D30: label
Dx86_32-symbols.s95 D30: label
/external/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h67 case D31: case D30: case D29: case D28: in isARMArea3Register()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h142 case AArch64::D30: return AArch64::B30; in getBRegFromDReg()
182 case AArch64::B30: return AArch64::D30; in getDRegFromBReg()
/external/llvm-project/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h82 case D31: case D30: case D29: case D28: in isARMArea3Register()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.h79 case D31: case D30: case D29: case D28: in isARMArea3Register()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h141 case AArch64::D30: return AArch64::B30; in getBRegFromDReg()
181 case AArch64::B30: return AArch64::D30; in getDRegFromBReg()
/external/llvm-project/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h141 case AArch64::D30: return AArch64::B30; in getBRegFromDReg()
181 case AArch64::B30: return AArch64::D30; in getDRegFromBReg()
/external/OpenCSD/decoder/tests/snapshots/tc2-ptm-rstk-t32/
Ddevice1.ini278 D30(size:64)=0x601090C097650A02

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