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Searched refs:DCISW (Results 1 – 6 of 6) sorted by relevance

/external/arm-trusted-firmware/plat/arm/board/juno/aarch64/
Djuno_helpers.S258 mov x0, #DCISW
/external/arm-trusted-firmware/lib/aarch32/
Dcache_helpers.S139 stcopr r0, DCISW
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/
Dcore_cm7.h538 __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ member
2140 SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | in SCB_EnableDCache()
2215 SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | in SCB_InvalidateDCache()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/
Dcore_cm7.h538 __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ member
2140 SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | in SCB_EnableDCache()
2215 SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | in SCB_InvalidateDCache()
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h512 #define DCISW p15, 0, c7, c6, 2 macro
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h149 #define DCISW U(0x0) macro