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Searched refs:DDR_SEC_BASE (Results 1 – 6 of 6) sorted by relevance

/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_def.h32 #define DDR_SEC_BASE 0x3F000000 macro
35 #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
/external/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dhikey_layout.h92 #define BL32_DRAM_BASE DDR_SEC_BASE
93 #define BL32_DRAM_LIMIT (DDR_SEC_BASE+DDR_SEC_SIZE)
Dhikey_def.h30 #define DDR_SEC_BASE (DDR_BASE + DDR_SIZE - DDR_SEC_SIZE) /* 0x3F000000 */ macro
33 #define DDR_SDP_BASE (DDR_SEC_BASE - 0x400000 /* align */ - \
/external/arm-trusted-firmware/plat/hisilicon/hikey960/include/
Dplatform_def.h77 #define BL32_DRAM_BASE DDR_SEC_BASE
78 #define BL32_DRAM_LIMIT (DDR_SEC_BASE+DDR_SEC_SIZE)
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_security.c106 sec_protect(DDR_SEC_BASE, DDR_SEC_SIZE, 1); in hikey_security_setup()
/external/arm-trusted-firmware/plat/hisilicon/poplar/include/
Dplatform_def.h80 #define DDR_SEC_BASE 0x03000000 macro