/external/arm-trusted-firmware/plat/socionext/uniphier/ |
D | uniphier_image_desc.c | 50 DISABLE_ALL_EXCEPTIONS), 72 DISABLE_ALL_EXCEPTIONS), 90 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/xilinx/common/ |
D | plat_startup.c | 230 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover() 233 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover() 245 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover() 253 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover()
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/external/arm-trusted-firmware/plat/qemu/common/ |
D | qemu_bl2_setup.c | 113 DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl32_entry() 134 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry() 138 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()
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D | qemu_bl2_mem_params_desc.c | 30 DISABLE_ALL_EXCEPTIONS), 47 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/intel/soc/common/ |
D | bl2_plat_mem_params_desc.c | 49 DISABLE_ALL_EXCEPTIONS), 69 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/renesas/common/ |
D | bl2_plat_mem_params_desc.c | 33 MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS), 72 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/layerscape/common/aarch64/ |
D | ls_bl2_mem_params_desc.c | 35 DISABLE_ALL_EXCEPTIONS), 56 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/layerscape/common/ |
D | ls_common.c | 160 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in ls_get_spsr_for_bl33_entry() 181 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in ls_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/arm/common/aarch64/ |
D | execution_state_switch.c | 131 endianness, DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch() 140 DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch()
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D | arm_bl2_mem_params_desc.c | 48 DISABLE_ALL_EXCEPTIONS), 68 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/arm/common/ |
D | arm_common.c | 100 spsr = SPSR_64((uint64_t)mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry() 121 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/services/spd/tlkd/ |
D | tlkd_common.c | 98 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state() 103 DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
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/external/arm-trusted-firmware/plat/hisilicon/poplar/ |
D | bl2_plat_setup.c | 75 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry() 93 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
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D | bl2_plat_mem_params_desc.c | 49 DISABLE_ALL_EXCEPTIONS), 69 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/imx/imx7/common/ |
D | imx7_bl2_el3_common.c | 44 DISABLE_ALL_EXCEPTIONS); in imx7_get_spsr_for_bl32_entry() 51 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in imx7_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
D | hikey960_bl2_mem_params_desc.c | 49 DISABLE_ALL_EXCEPTIONS), 69 DISABLE_ALL_EXCEPTIONS),
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D | hikey960_bl2_setup.c | 186 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey960_get_spsr_for_bl33_entry() 204 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in hikey960_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/hisilicon/hikey/ |
D | hikey_bl2_mem_params_desc.c | 49 DISABLE_ALL_EXCEPTIONS), 69 DISABLE_ALL_EXCEPTIONS),
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D | hikey_bl2_setup.c | 94 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey_get_spsr_for_bl33_entry() 112 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in hikey_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/marvell/armada/common/aarch64/ |
D | marvell_bl2_mem_params_desc.c | 50 DISABLE_ALL_EXCEPTIONS), 70 DISABLE_ALL_EXCEPTIONS),
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/external/arm-trusted-firmware/plat/rpi/common/ |
D | rpi3_common.c | 217 DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry() 219 return SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/ti/k3/common/ |
D | k3_bl31_setup.c | 55 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in k3_get_spsr_for_bl33_entry() 77 DISABLE_ALL_EXCEPTIONS); in bl31_early_platform_setup2()
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/external/arm-trusted-firmware/plat/arm/board/juno/ |
D | juno_bl2_setup.c | 28 DISABLE_ALL_EXCEPTIONS); in arm_bl2_plat_handle_post_image_load()
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/external/arm-trusted-firmware/plat/intel/soc/common/aarch64/ |
D | platform_common.c | 57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/brcm/common/ |
D | brcm_common.c | 52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in brcm_get_spsr_for_bl33_entry()
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