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Searched refs:DISABLE_ALL_EXCEPTIONS (Results 1 – 25 of 58) sorted by relevance

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/external/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_image_desc.c50 DISABLE_ALL_EXCEPTIONS),
72 DISABLE_ALL_EXCEPTIONS),
90 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/xilinx/common/
Dplat_startup.c230 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover()
233 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover()
245 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover()
253 DISABLE_ALL_EXCEPTIONS); in fsbl_atf_handover()
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_bl2_setup.c113 DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl32_entry()
134 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()
138 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()
Dqemu_bl2_mem_params_desc.c30 DISABLE_ALL_EXCEPTIONS),
47 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/intel/soc/common/
Dbl2_plat_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/renesas/common/
Dbl2_plat_mem_params_desc.c33 MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
72 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/layerscape/common/aarch64/
Dls_bl2_mem_params_desc.c35 DISABLE_ALL_EXCEPTIONS),
56 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/layerscape/common/
Dls_common.c160 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in ls_get_spsr_for_bl33_entry()
181 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in ls_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/arm/common/aarch64/
Dexecution_state_switch.c131 endianness, DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch()
140 DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch()
Darm_bl2_mem_params_desc.c48 DISABLE_ALL_EXCEPTIONS),
68 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/arm/common/
Darm_common.c100 spsr = SPSR_64((uint64_t)mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
121 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/services/spd/tlkd/
Dtlkd_common.c98 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
103 DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
/external/arm-trusted-firmware/plat/hisilicon/poplar/
Dbl2_plat_setup.c75 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
93 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
Dbl2_plat_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/imx/imx7/common/
Dimx7_bl2_el3_common.c44 DISABLE_ALL_EXCEPTIONS); in imx7_get_spsr_for_bl32_entry()
51 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in imx7_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_bl2_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
Dhikey960_bl2_setup.c186 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey960_get_spsr_for_bl33_entry()
204 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in hikey960_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_bl2_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
Dhikey_bl2_setup.c94 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey_get_spsr_for_bl33_entry()
112 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in hikey_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/marvell/armada/common/aarch64/
Dmarvell_bl2_mem_params_desc.c50 DISABLE_ALL_EXCEPTIONS),
70 DISABLE_ALL_EXCEPTIONS),
/external/arm-trusted-firmware/plat/rpi/common/
Drpi3_common.c217 DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry()
219 return SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/ti/k3/common/
Dk3_bl31_setup.c55 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in k3_get_spsr_for_bl33_entry()
77 DISABLE_ALL_EXCEPTIONS); in bl31_early_platform_setup2()
/external/arm-trusted-firmware/plat/arm/board/juno/
Djuno_bl2_setup.c28 DISABLE_ALL_EXCEPTIONS); in arm_bl2_plat_handle_post_image_load()
/external/arm-trusted-firmware/plat/intel/soc/common/aarch64/
Dplatform_common.c57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
/external/arm-trusted-firmware/plat/brcm/common/
Dbrcm_common.c52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in brcm_get_spsr_for_bl33_entry()

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