| /external/llvm-project/clang-tools-extra/test/clang-tidy/checkers/ |
| D | modernize-make-shared.cpp | 20 struct DPair { struct
21 DPair() : a(0), b(0) {} in DPair() function
22 DPair(int x, int y) : a(y), b(x) {} in DPair() argument
206 std::shared_ptr<DPair> PDir1 = std::shared_ptr<DPair>(new DPair(1, T)); in initialization()
209 PDir1.reset(new DPair(1, T)); in initialization()
214 std::shared_ptr<DPair> PDir2 = std::shared_ptr<DPair>(new DPair{2, T}); in initialization()
217 PDir2.reset(new DPair{2, T}); in initialization()
233 std::shared_ptr<DPair> PDir3 = std::shared_ptr<DPair>{new DPair(3, T)}; in initialization()
238 std::shared_ptr<DPair> PDir4 = std::shared_ptr<DPair>{new DPair{4, T}}; in initialization()
248 std::shared_ptr<DPair> PDir5 = std::shared_ptr<DPair>(new DPair()); in initialization()
[all …]
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| D | modernize-make-unique.cpp | 21 struct DPair { struct
22 DPair() : a(0), b(0) {} in DPair() argument
23 DPair(int x, int y) : a(y), b(x) {} in DPair() function
251 std::unique_ptr<DPair> PDir1 = std::unique_ptr<DPair>(new DPair(1, T)); in initialization()
254 PDir1.reset(new DPair(1, T)); in initialization()
259 std::unique_ptr<DPair> PDir2 = std::unique_ptr<DPair>(new DPair{2, T}); in initialization()
262 PDir2.reset(new DPair{2, T}); in initialization()
286 std::unique_ptr<DPair> PDir3 = std::unique_ptr<DPair>{new DPair(3, T)}; in initialization()
291 std::unique_ptr<DPair> PDir4 = std::unique_ptr<DPair>{new DPair{4, T}}; in initialization()
301 std::unique_ptr<DPair> PDir5 = std::unique_ptr<DPair>(new DPair()); in initialization()
[all …]
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| /external/libcxx/test/std/utilities/utility/pairs/pairs.pair/ |
| D | rv_pair_U_V.pass.cpp | 52 struct DPair : public std::pair<T, U> { struct
79 using P1 = DPair<long, long>; in main()
|
| D | const_pair_U_V.pass.cpp | 40 struct DPair : public std::pair<T, U> { struct
69 using P1 = DPair<long, long>; in main()
|
| /external/llvm-project/libcxx/test/std/utilities/utility/pairs/pairs.pair/ |
| D | rv_pair_U_V.pass.cpp | 53 struct DPair : public std::pair<T, U> { struct
80 using P1 = DPair<long, long>; in main()
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| D | const_pair_U_V.pass.cpp | 39 struct DPair : public std::pair<T, U> { struct
67 using P1 = DPair<long, long>; in test()
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | a15-SD-dep.ll | 56 ; Test that DPair can be successfully passed as QPR.
|
| /external/llvm/test/CodeGen/ARM/ |
| D | a15-SD-dep.ll | 60 ; Test that DPair can be successfully passed as QPR.
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | crash.ll | 53 ; Make sure the DPair register class can spill.
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | crash.ll | 53 ; Make sure the DPair register class can spill.
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 476 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
480 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16)),
481 (add (trunc QPR, 8), (trunc DPair, 16))];
|
| D | ARMInstrNEON.td | 137 def VecListDPair : RegisterOperand<DPair, "printVectorListTwo"> {
164 def VecListDPairSpaced : RegisterOperand<DPair, "printVectorListTwoSpaced"> {
201 def VecListDPairAllLanes : RegisterOperand<DPair,
568 : PseudoVFPLdStM<(outs DPair:$dst), (ins GPR:$Rn),
570 [(set DPair:$dst, (v2f64 (word_alignedload GPR:$Rn)))]>;
575 : PseudoVFPLdStM<(outs), (ins DPair:$src, GPR:$Rn),
577 [(word_alignedstore (v2f64 DPair:$src), GPR:$Rn)]>;
7065 (v8i8 (VTBL2 (REG_SEQUENCE DPair, v8i8:$Vn0, dsub_0,
7071 (REG_SEQUENCE DPair, v8i8:$Vn0, dsub_0,
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 487 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
491 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16)),
492 (add (trunc QPR, 8), (trunc DPair, 16))];
|
| D | ARMInstrNEON.td | 137 def VecListDPair : RegisterOperand<DPair, "printVectorListTwo"> {
164 def VecListDPairSpaced : RegisterOperand<DPair, "printVectorListTwoSpaced"> {
201 def VecListDPairAllLanes : RegisterOperand<DPair,
544 : PseudoVFPLdStM<(outs DPair:$dst), (ins GPR:$Rn),
546 [(set DPair:$dst, (v2f64 (word_alignedload GPR:$Rn)))]>;
551 : PseudoVFPLdStM<(outs), (ins DPair:$src, GPR:$Rn),
553 [(word_alignedstore (v2f64 DPair:$src), GPR:$Rn)]>;
7116 (v8i8 (VTBL2 (REG_SEQUENCE DPair, v8i8:$Vn0, dsub_0,
7122 (REG_SEQUENCE DPair, v8i8:$Vn0, dsub_0,
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 338 def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
342 let AltOrders = [(add (rotl QPR, 8), (rotl DPair, 16))];
|
| D | ARMInstrNEON.td | 148 def VecListDPair : RegisterOperand<DPair, "printVectorListTwo"> {
175 def VecListDPairSpaced : RegisterOperand<DPair, "printVectorListTwoSpaced"> {
212 def VecListDPairAllLanes : RegisterOperand<DPair,
222 def VecListDPairSpacedAllLanes : RegisterOperand<DPair,
611 : PseudoVFPLdStM<(outs DPair:$dst), (ins GPR:$Rn),
613 [(set DPair:$dst, (v2f64 (load GPR:$Rn)))]>;
618 : PseudoVFPLdStM<(outs), (ins DPair:$src, GPR:$Rn),
620 [(store (v2f64 DPair:$src), GPR:$Rn)]>;
|
| /external/capstone/arch/ARM/ |
| D | ARMGenRegisterInfo.inc | 1489 // DPair Register Class...
1490 static MCPhysReg DPair[] = {
1494 // DPair Bit set.
2211 { DPair, DPairBits, 2324, 31, sizeof(DPairBits), ARM_DPairRegClassID, 16, 16, 1, 1 },
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterInfo.inc | 2085 // DPair Register Class...
2086 const MCPhysReg DPair[] = {
2090 // DPair Bit set.
2943 { DPair, DPairBits, 2468, 31, sizeof(DPairBits), ARM::DPairRegClassID, 1, true },
3878 { 128, 128, 128, VTLists+33 }, // DPair
11583 { // DPair
11584 53, // dsub_0 -> DPair
11585 53, // dsub_1 -> DPair
15708 {4, 64}, // DPair
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| D | ARMGenInstrInfo.inc | 14830 DPair = 301,
21736 OpTypes::DPair, OpTypes::GPR, OpTypes::i32imm, OpTypes::i32imm,
22701 OpTypes::DPair, OpTypes::GPR, OpTypes::i32imm, OpTypes::i32imm,
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| D | ARMGenDAGISel.inc | 27632 … (VTBX2:{ *:[v8i8] } v8i8:{ *:[v8i8] }:$orig, (REG_SEQUENCE:{ *:[v16i8] } DPair:{ *:[i32] }, v8i8:…
29974 …// Src: (st DPair:{ *:[v2f64] }:$src, GPR:{ *:[i32] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predic…
29975 // Dst: (VSTMQIA DPair:{ *:[v2f64] }:$src, GPR:{ *:[i32] }:$Rn)
64170 …// Dst: (VTBL2:{ *:[v8i8] } (REG_SEQUENCE:{ *:[v16i8] } DPair:{ *:[i32] }, v8i8:{ *:[v8i8] }:$Vn0,…
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| D | ARMGenAsmMatcher.inc | 5682 MCK_DPair, // register class 'DPair'
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| D | ARMGenGlobalISel.inc | 25368 … (VTBX2:{ *:[v8i8] } v8i8:{ *:[v8i8] }:$orig, (REG_SEQUENCE:{ *:[v16i8] } DPair:{ *:[i32] }, v8i8:…
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