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Searched refs:DR0 (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dipra-reg-usage.ll6 …BND3 CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 CR8 CR9 CR10 CR11 CR12 CR13 CR14 CR15 DR0 DR1 DR2 DR3 DR4 DR5…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h345 ENTRY(DR0) \
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h337 ENTRY(DR0) \
/external/llvm-project/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h342 ENTRY(DR0) \
/external/capstone/arch/X86/
DX86DisassemblerDecoder.h348 ENTRY(DR0) \
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def98 CV_REGISTER(DR0, 90)
/external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
DCodeViewRegisters.def99 CV_REGISTER(DR0, 90)
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td266 def DR0 : X86Reg<"dr0", 0>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86RegisterInfo.td324 def DR0 : X86Reg<"dr0", 0>;
/external/llvm-project/llvm/lib/Target/X86/
DX86RegisterInfo.td334 def DR0 : X86Reg<"dr0", 0>;
/external/mesa3d/src/mesa/x86/
Dassyntax.h129 #define DR0 dr0 macro
191 #define DR0 %db0 macro
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp963 case '0': RegNo = X86::DR0; break; in ParseRegister()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1223 case '0': RegNo = X86::DR0; break; in ParseRegister()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc107 DR0 = 87,
1207 { X86::DR0 },
1626 …X86::DR0, X86::DR1, X86::DR2, X86::DR3, X86::DR4, X86::DR5, X86::DR6, X86::DR7, X86::DR8, X86::DR9…
DX86GenAsmMatcher.inc7325 case X86::DR0: OpKind = MCK_DEBUG_REG; break;
/external/llvm-project/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1401 RegNo = X86::DR0; in MatchRegisterByName()