1 /*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <common/debug.h>
8 #include <common/runtime_svc.h>
9 #include <lib/mmio.h>
10
11 #include <cdn_dp.h>
12 #include <dfs.h>
13 #include <plat_sip_calls.h>
14 #include <rockchip_sip_svc.h>
15
16 #define RK_SIP_DDR_CFG 0x82000008
17 #define DRAM_INIT 0x00
18 #define DRAM_SET_RATE 0x01
19 #define DRAM_ROUND_RATE 0x02
20 #define DRAM_SET_AT_SR 0x03
21 #define DRAM_GET_BW 0x04
22 #define DRAM_GET_RATE 0x05
23 #define DRAM_CLR_IRQ 0x06
24 #define DRAM_SET_PARAM 0x07
25 #define DRAM_SET_ODT_PD 0x08
26
27 #define RK_SIP_HDCP_CONTROL 0x82000009
28 #define RK_SIP_HDCP_KEY_DATA64 0xC200000A
29
ddr_smc_handler(uint64_t arg0,uint64_t arg1,uint64_t id,uint64_t arg2)30 uint32_t ddr_smc_handler(uint64_t arg0, uint64_t arg1,
31 uint64_t id, uint64_t arg2)
32 {
33 switch (id) {
34 case DRAM_SET_RATE:
35 return ddr_set_rate((uint32_t)arg0);
36 case DRAM_ROUND_RATE:
37 return ddr_round_rate((uint32_t)arg0);
38 case DRAM_GET_RATE:
39 return ddr_get_rate();
40 case DRAM_SET_ODT_PD:
41 dram_set_odt_pd(arg0, arg1, arg2);
42 break;
43 default:
44 break;
45 }
46
47 return 0;
48 }
49
rockchip_plat_sip_handler(uint32_t smc_fid,u_register_t x1,u_register_t x2,u_register_t x3,u_register_t x4,void * cookie,void * handle,u_register_t flags)50 uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid,
51 u_register_t x1,
52 u_register_t x2,
53 u_register_t x3,
54 u_register_t x4,
55 void *cookie,
56 void *handle,
57 u_register_t flags)
58 {
59 #ifdef PLAT_RK_DP_HDCP
60 uint64_t x5, x6;
61 #endif
62
63 switch (smc_fid) {
64 case RK_SIP_DDR_CFG:
65 SMC_RET1(handle, ddr_smc_handler(x1, x2, x3, x4));
66 #ifdef PLAT_RK_DP_HDCP
67 case RK_SIP_HDCP_CONTROL:
68 SMC_RET1(handle, dp_hdcp_ctrl(x1));
69 case RK_SIP_HDCP_KEY_DATA64:
70 x5 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X5);
71 x6 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X6);
72 SMC_RET1(handle, dp_hdcp_store_key(x1, x2, x3, x4, x5, x6));
73 #endif
74 default:
75 ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
76 SMC_RET1(handle, SMC_UNK);
77 }
78 }
79