Searched refs:DRVCTRL1_MASK (Results 1 – 6 of 6) sorted by relevance
209 #define DRVCTRL1_MASK (0xCCCCCCC8U) macro923 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_h3_v2()
207 #define DRVCTRL1_MASK (0xCCCCCCC8U) macro890 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_h3_v1()
211 #define DRVCTRL1_MASK (0xCCCCCCC8U) macro925 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_m3n()
212 #define DRVCTRL1_MASK (0xCCCCCCC8U) macro1007 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_g2m()
212 #define DRVCTRL1_MASK (0xCCCCCCC8U) macro1018 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_m3()
212 #define DRVCTRL1_MASK (0xCCCCCCC8U) macro