Searched refs:DRVCTRL1_QSPI1_MISO_IO1 (Results 1 – 6 of 6) sorted by relevance
242 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U) macro923 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_h3_v2()
240 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U) macro890 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_h3_v1()
244 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U) macro925 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_m3n()
245 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U) macro1007 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_g2m()
245 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U) macro1018 reg = ((reg & DRVCTRL1_MASK) | DRVCTRL1_QSPI1_MISO_IO1(3) in pfc_init_m3()
245 #define DRVCTRL1_QSPI1_MISO_IO1(x) ((uint32_t)(x) << 28U) macro