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Searched refs:DRVCTRL20_MSIOF0_TXD (Results 1 – 6 of 6) sorted by relevance

/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/H3/
Dpfc_init_h3_v2.c390 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1109 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_h3_v2()
Dpfc_init_h3_v1.c388 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1076 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_h3_v1()
/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/M3N/
Dpfc_init_m3n.c392 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1111 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_m3n()
/external/arm-trusted-firmware/drivers/renesas/rzg/pfc/G2M/
Dpfc_init_g2m.c393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1193 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_g2m()
/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/M3/
Dpfc_init_m3.c393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro
1204 reg = ((reg & DRVCTRL20_MASK) | DRVCTRL20_MSIOF0_TXD(7) in pfc_init_m3()
/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/D3/
Dpfc_init_d3.c393 #define DRVCTRL20_MSIOF0_TXD(x) ((uint32_t)(x) << 28U) macro