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Searched refs:DRV_MAX_PLANES (Results 1 – 16 of 16) sorted by relevance

/external/minigbm/cros_gralloc/
Dcros_gralloc_handle.h13 #define DRV_MAX_PLANES 4 macro
14 #define DRV_MAX_FDS (DRV_MAX_PLANES + 1)
26 uint32_t strides[DRV_MAX_PLANES];
27 uint32_t offsets[DRV_MAX_PLANES];
28 uint32_t sizes[DRV_MAX_PLANES];
Dcros_gralloc_buffer.h28 uint8_t *addr[DRV_MAX_PLANES]);
30 int32_t resource_info(uint32_t strides[DRV_MAX_PLANES], uint32_t offsets[DRV_MAX_PLANES],
52 struct mapping *lock_data_[DRV_MAX_PLANES];
Dcros_gralloc_buffer.cc54 uint8_t *addr[DRV_MAX_PLANES]) in lock() argument
58 memset(addr, 0, DRV_MAX_PLANES * sizeof(*addr)); in lock()
118 int32_t cros_gralloc_buffer::resource_info(uint32_t strides[DRV_MAX_PLANES], in resource_info() argument
119 uint32_t offsets[DRV_MAX_PLANES], in resource_info() argument
Dcros_gralloc_driver.h32 uint8_t *addr[DRV_MAX_PLANES]);
39 int32_t resource_info(buffer_handle_t handle, uint32_t strides[DRV_MAX_PLANES],
40 uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier);
Dcros_gralloc_driver.cc354 uint32_t map_flags, uint8_t *addr[DRV_MAX_PLANES]) in lock() argument
467 int32_t cros_gralloc_driver::resource_info(buffer_handle_t handle, uint32_t strides[DRV_MAX_PLANES], in resource_info() argument
468 uint32_t offsets[DRV_MAX_PLANES], in resource_info() argument
/external/minigbm/
Ddrv_priv.h24 uint32_t offsets[DRV_MAX_PLANES];
25 uint32_t sizes[DRV_MAX_PLANES];
26 uint32_t strides[DRV_MAX_PLANES];
47 union bo_handle handles[DRV_MAX_PLANES];
95 int (*resource_info)(struct bo *bo, uint32_t strides[DRV_MAX_PLANES],
96 uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier);
Ddrv.h18 #define DRV_MAX_PLANES 4 macro
86 int fds[DRV_MAX_PLANES];
87 uint32_t strides[DRV_MAX_PLANES];
88 uint32_t offsets[DRV_MAX_PLANES];
103 uint32_t map_strides[DRV_MAX_PLANES];
186 int drv_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES],
187 uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier);
Dhelpers.c23 int horizontal_subsampling[DRV_MAX_PLANES];
24 int vertical_subsampling[DRV_MAX_PLANES];
25 int bytes_per_pixel[DRV_MAX_PLANES];
273 uint32_t padding[DRV_MAX_PLANES] = { 0 }; in drv_bo_from_format()
278 uint32_t format, uint32_t padding[DRV_MAX_PLANES]) in drv_bo_from_format_and_padding() argument
Dhelpers.h28 uint32_t format, uint32_t padding[DRV_MAX_PLANES]);
Dvirtgpu_virgl.c207 struct rectangle xfer_boxes[DRV_MAX_PLANES];
959 static int virgl_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES], in virgl_resource_info() argument
960 uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier) in virgl_resource_info() argument
Dmediatek.c126 uint32_t padding[DRV_MAX_PLANES] = { 0 }; in mediatek_bo_create_with_modifiers()
Ddrv.c685 int drv_resource_info(struct bo *bo, uint32_t strides[DRV_MAX_PLANES], in drv_resource_info() argument
686 uint32_t offsets[DRV_MAX_PLANES], uint64_t *format_modifier) in drv_resource_info() argument
Ddri.c92 off_t dmabuf_sizes[DRV_MAX_PLANES]; in import_into_minigbm()
/external/minigbm/cros_gralloc/gralloc0/
Dgralloc0.cc310 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 }; in gralloc0_perform()
311 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 }; in gralloc0_perform()
427 uint8_t *addr[DRV_MAX_PLANES]; in gralloc0_lock_async()
475 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 }; in gralloc0_lock_async_ycbcr()
476 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 }; in gralloc0_lock_async_ycbcr()
478 uint8_t *addr[DRV_MAX_PLANES] = { nullptr, nullptr, nullptr, nullptr }; in gralloc0_lock_async_ycbcr()
518 for (uint32_t plane = 0; plane < DRV_MAX_PLANES; plane++) in gralloc0_lock_async_ycbcr()
/external/minigbm/cros_gralloc/gralloc3/
DCrosGralloc3Mapper.h55 uint8_t* mapped[DRV_MAX_PLANES];
/external/minigbm/cros_gralloc/gralloc4/
DCrosGralloc4Mapper.cc336 uint8_t* addr[DRV_MAX_PLANES]; in lock()