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Searched refs:DSLL (Results 1 – 25 of 45) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dload.ll76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
132 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
140 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
[all …]
Dstore.ll75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
221 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL
299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL
307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/
Dfcopysign-f32-f64.ll46 ; 64: dsll $[[DSLL:[0-9]+]], $[[SRL]], 63
47 ; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
/external/llvm/test/CodeGen/Mips/
Dfcopysign-f32-f64.ll41 ; 64: dsll $[[DSLL:[0-9]+]], $[[SRL]], 63
47 ; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
/external/llvm-project/llvm/test/DebugInfo/MIR/Mips/
Dlive-debug-values-reg-copy.mir188 renamable $at_64 = DSLL killed renamable $at_64, 16
190 renamable $at_64 = DSLL killed renamable $at_64, 16
208 renamable $at_64 = DSLL killed renamable $at_64, 16
210 renamable $at_64 = DSLL killed renamable $at_64, 16
221 renamable $at_64 = DSLL killed renamable $at_64, 16
223 renamable $at_64 = DSLL killed renamable $at_64, 16
/external/llvm-project/llvm/test/CodeGen/Mips/mirparser/
Dtarget-flags-static-tls.mir153 %11 = DSLL killed %10, 16
155 %13 = DSLL killed %12, 16
210 %39 = DSLL killed %38, 16
212 %41 = DSLL killed %40, 16
/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_64.c85 ins = (shift == 32) ? DSLL32 : DSLL; in load_immediate()
113 FAIL_IF(push_inst(compiler, DSLL | TA(dst_ar) | DA(dst_ar) | SH_IMM(shift - shift2), dst_ar)); in load_immediate()
115 FAIL_IF(push_inst(compiler, DSLL | TA(dst_ar) | DA(dst_ar) | SH_IMM(shift2), dst_ar)); in load_immediate()
242 …FAIL_IF(push_inst(compiler, SELECT_OP(DSLL, SLL) | T(TMP_REG1) | D(TMP_REG1) | SH_IMM(1), UNMOVABL… in emit_single_op()
499 EMIT_SHIFT(DSLL, DSLL32, SLL, DSLLV, SLLV); in emit_single_op()
519 FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst))); in emit_const()
521 FAIL_IF(push_inst(compiler, DSLL | T(dst) | D(dst) | SH_IMM(16), DR(dst))); in emit_const()
DsljitNativeMIPS_common.c189 #define DSLL (HI(0) | LO(56)) macro
281 #define SLL_W DSLL
485 inst[2] = DSLL | T(reg) | D(reg) | SH_IMM(16); in put_label_set()
491 inst[2] = DSLL | T(reg) | D(reg) | SH_IMM(16); in put_label_set()
493 inst[4] = DSLL | T(reg) | D(reg) | SH_IMM(16); in put_label_set()
/external/llvm-project/llvm/test/CodeGen/Mips/longbranch/
Dbranch-limits-int-mips64.mir147 ; PIC: $at_64 = DSLL $at_64, 16
249 ; PIC: $at_64 = DSLL $at_64, 16
351 ; PIC: $at_64 = DSLL $at_64, 16
453 ; PIC: $at_64 = DSLL $at_64, 16
555 ; PIC: $at_64 = DSLL $at_64, 16
657 ; PIC: $at_64 = DSLL $at_64, 16
Dbranch-limits-int-mips64r6.mir369 ; PIC: $at_64 = DSLL $at_64, 16
467 ; PIC: $at_64 = DSLL $at_64, 16
565 ; PIC: $at_64 = DSLL $at_64, 16
663 ; PIC: $at_64 = DSLL $at_64, 16
761 ; PIC: $at_64 = DSLL $at_64, 16
859 ; PIC: $at_64 = DSLL $at_64, 16
957 ; PIC: $at_64 = DSLL $at_64, 16
1055 ; PIC: $at_64 = DSLL $at_64, 16
1153 ; PIC: $at_64 = DSLL $at_64, 16
1251 ; PIC: $at_64 = DSLL $at_64, 16
Dbranch-limits-msa.mir298 ; PIC: $at_64 = DSLL $at_64, 16
413 ; PIC: $at_64 = DSLL $at_64, 16
527 ; PIC: $at_64 = DSLL $at_64, 16
639 ; PIC: $at_64 = DSLL $at_64, 16
750 ; PIC: $at_64 = DSLL $at_64, 16
865 ; PIC: $at_64 = DSLL $at_64, 16
980 ; PIC: $at_64 = DSLL $at_64, 16
1094 ; PIC: $at_64 = DSLL $at_64, 16
1206 ; PIC: $at_64 = DSLL $at_64, 16
1317 ; PIC: $at_64 = DSLL $at_64, 16
/external/llvm-project/llvm/lib/Target/Mips/
DMipsAnalyzeImmediate.cpp141 SLL = Mips::DSLL; in Analyze()
DMipsBranchExpansion.cpp600 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
692 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
699 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
DMips64InstrInfo.td167 def DSLL : shift_rotate_imm<"dsll", uimm6, GPR64Opnd, II_DSLL, shl,
649 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16)>, ISA_MIPS3, GPR_64;
652 (ORi64 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16),
/external/llvm/lib/Target/Mips/
DMipsAnalyzeImmediate.cpp138 SLL = Mips::DSLL; in Analyze()
DMipsLongBranch.cpp395 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsAnalyzeImmediate.cpp141 SLL = Mips::DSLL; in Analyze()
DMipsBranchExpansion.cpp591 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
683 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
690 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
DMips64InstrInfo.td167 def DSLL : shift_rotate_imm<"dsll", uimm6, GPR64Opnd, II_DSLL, shl,
649 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16)>, ISA_MIPS3, GPR_64;
652 (ORi64 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16),
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp69 case Mips::DSLL: in LowerLargeShift()
196 case Mips::DSLL: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp76 case Mips::DSLL: in LowerLargeShift()
164 case Mips::DSLL: in encodeInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp76 case Mips::DSLL: in LowerLargeShift()
164 case Mips::DSLL: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp2788 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in loadImmediate()
2817 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, ShiftAmount, IDLoc, STI); in loadImmediate()
3115 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3118 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3165 TOut.emitRRI(Mips::DSLL, DstReg, DstReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3168 TOut.emitRRI(Mips::DSLL, DstReg, DstReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3331 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in emitPartialAddress()
3334 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in emitPartialAddress()
3783 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
3785 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp2760 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in loadImmediate()
2789 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, ShiftAmount, IDLoc, STI); in loadImmediate()
3087 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3090 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3137 TOut.emitRRI(Mips::DSLL, DstReg, DstReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3140 TOut.emitRRI(Mips::DSLL, DstReg, DstReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3303 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in emitPartialAddress()
3306 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in emitPartialAddress()
3755 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
3757 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in expandMem16Inst()
[all …]
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp2237 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, STI); in loadImmediate()
2266 TOut.emitRRI(Mips::DSLL, TmpReg, TmpReg, ShiftAmount, IDLoc, STI); in loadImmediate()
2473 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
2476 TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI); in loadAndAddSymbolAddress()
3629 FirstShift = Mips::DSLL; in expandDRotationImm()
3652 SecondShift = Mips::DSLL; in expandDRotationImm()

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