| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_64.c | 207 return push_inst(compiler, DSRL32 | T(dst) | D(dst) | SH_IMM(0), DR(dst)); in emit_single_op()
230 …FAIL_IF(push_inst(compiler, SELECT_OP(DSRL32, SRL) | T(src2) | DA(EQUAL_FLAG) | SH_IMM(31), EQUAL_… in emit_single_op()
295 …return push_inst(compiler, SELECT_OP(DSRL32, SRL) | TA(OTHER_FLAG) | DA(OTHER_FLAG) | SH_IMM(31), … in emit_single_op()
428 …return push_inst(compiler, SELECT_OP(DSRL32, SRL) | TA(OTHER_FLAG) | DA(OTHER_FLAG) | SH_IMM(31), … in emit_single_op()
503 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
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| D | sljitNativeMIPS_common.c | 196 #define DSRL32 (HI(0) | LO(62)) macro
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 73 Inst.setOpcode(Mips::DSRL32); in LowerLargeShift()
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| /external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 80 Inst.setOpcode(Mips::DSRL32); in LowerLargeShift()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 80 Inst.setOpcode(Mips::DSRL32); in LowerLargeShift()
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2228 TOut.emitRRI(Mips::DSRL32, TmpReg, TmpReg, 0, IDLoc, STI); in loadImmediate()
3630 SecondShift = Mips::DSRL32; in expandDRotationImm()
3634 SecondShift = Mips::DSRL32; in expandDRotationImm()
3647 FirstShift = Mips::DSRL32; in expandDRotationImm()
3651 FirstShift = Mips::DSRL32; in expandDRotationImm()
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2779 TOut.emitRRI(Mips::DSRL32, TmpReg, TmpReg, 0, IDLoc, STI); in loadImmediate()
5096 SecondShift = Mips::DSRL32; in expandDRotationImm()
5100 SecondShift = Mips::DSRL32; in expandDRotationImm()
5113 FirstShift = Mips::DSRL32; in expandDRotationImm()
5117 FirstShift = Mips::DSRL32; in expandDRotationImm()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2751 TOut.emitRRI(Mips::DSRL32, TmpReg, TmpReg, 0, IDLoc, STI); in loadImmediate()
4986 SecondShift = Mips::DSRL32; in expandDRotationImm()
4990 SecondShift = Mips::DSRL32; in expandDRotationImm()
5003 FirstShift = Mips::DSRL32; in expandDRotationImm()
5007 FirstShift = Mips::DSRL32; in expandDRotationImm()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 158 def DSRL32 : StdMMR6Rel, shift_rotate_imm<"dsrl32", uimm5, GPR64Opnd,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 184 def DSRL32 : shift_rotate_imm<"dsrl32", uimm5, GPR64Opnd, II_DSRL32>,
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| D | MipsScheduleGeneric.td | 128 DSRL32, DSRLV, DSUB, DSUBu, LEA_ADDiu64,
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 184 def DSRL32 : shift_rotate_imm<"dsrl32", uimm5, GPR64Opnd, II_DSRL32>,
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| D | MipsScheduleGeneric.td | 128 DSRL32, DSRLV, DSUB, DSUBu, LEA_ADDiu64,
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1088 {DBGFIELD("DSRL32") 1, false, false, 1, 2, 1, 1, 0, 0}, // #828
2772 {DBGFIELD("DSRL32") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #828
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| D | MipsGenMCCodeEmitter.inc | 1415 UINT64_C(62), // DSRL32
5338 case Mips::DSRL32:
10877 CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRL32 = 1402
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| D | MipsGenAsmWriter.inc | 2643 268452095U, // DSRL32
5397 4U, // DSRL32
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| D | MipsGenAsmMatcher.inc | 6505 …{ 3907 /* dsrl32 */, Mips::DSRL32, Convert__GPR64AsmReg1_0__GPR64AsmReg1_0__ConstantUImm5_01_1, AM…
6506 …{ 3907 /* dsrl32 */, Mips::DSRL32, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__ConstantUImm5_01_2, AM…
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| D | MipsGenInstrInfo.inc | 1417 DSRL32 = 1402,
3608 DSRL32 = 828,
6263 …odeledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr }, // Inst #1402 = DSRL32
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| D | MipsGenDisassemblerTables.inc | 6948 /* 458 */ MCD::OPC_Decode, 250, 10, 240, 2, // Opcode: DSRL32
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 661 134234329U, // DSRL32
2450 1U, // DSRL32
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| D | MipsGenDisassemblerTables.inc | 4353 /* 338 */ MCD_OPC_Decode, 132, 5, 254, 1, // Opcode: DSRL32
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