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Searched refs:DST_OP_SEL (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIDefines.h188 DST_OP_SEL = 1 << 3 // VOP3 dst op_sel (share mask with OP_SEL_1) enumerator
DSIInstrInfo.td1316 int DST_OP_SEL = 8;
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIDefines.h192 DST_OP_SEL = 1 << 3 // VOP3 dst op_sel (share mask with OP_SEL_1) enumerator
DSIInstrInfo.td1358 int DST_OP_SEL = 8;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUInstPrinter.cpp948 if (HasDstSel && (Ops[0] & SISrcMods::DST_OP_SEL) != 0) in allOpsDefaultValue()
992 O << ',' << !!(Ops[0] & SISrcMods::DST_OP_SEL); in printPackedModifier()
/external/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUInstPrinter.cpp1047 if (HasDstSel && (Ops[0] & SISrcMods::DST_OP_SEL) != 0) in allOpsDefaultValue()
1091 O << ',' << !!(Ops[0] & SISrcMods::DST_OP_SEL); in printPackedModifier()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp6219 Inst.getOperand(ModIdx).setImm(ModVal | SISrcMods::DST_OP_SEL); in cvtVOP3OpSel()
/external/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp7030 Inst.getOperand(ModIdx).setImm(ModVal | SISrcMods::DST_OP_SEL); in cvtVOP3OpSel()