Searched refs:DecodePSHUFMask (Results 1 – 12 of 12) sorted by relevance
/external/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.h | 61 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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D | X86ShuffleDecode.cpp | 157 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSHUFMask() function
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Utils/ |
D | X86ShuffleDecode.h | 66 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm,
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D | X86ShuffleDecode.cpp | 147 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm, in DecodePSHUFMask() function
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/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86ShuffleDecode.h | 65 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm,
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D | X86InstComments.cpp | 901 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, in EmitAnyX86InstComments() 937 DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(), in EmitAnyX86InstComments() 1153 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, in EmitAnyX86InstComments() 1165 DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64, in EmitAnyX86InstComments()
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D | X86ShuffleDecode.cpp | 146 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm, in DecodePSHUFMask() function
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/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86InstComments.cpp | 585 DecodePSHUFMask(getRegOperandVectorVT(MI, MVT::i32, 0), in EmitAnyX86InstComments() 618 DecodePSHUFMask(MVT::v4i16, in EmitAnyX86InstComments() 818 DecodePSHUFMask(getRegOperandVectorVT(MI, MVT::f32, 0), in EmitAnyX86InstComments() 829 DecodePSHUFMask(getRegOperandVectorVT(MI, MVT::f64, 0), in EmitAnyX86InstComments()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86InstComments.cpp | 762 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, in EmitAnyX86InstComments() 798 DecodePSHUFMask(4, 16, MI->getOperand(NumOperands - 1).getImm(), in EmitAnyX86InstComments() 1014 DecodePSHUFMask(getRegOperandNumElts(MI, 32, 0), 32, in EmitAnyX86InstComments() 1026 DecodePSHUFMask(getRegOperandNumElts(MI, 64, 0), 64, in EmitAnyX86InstComments()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 4914 DecodePSHUFMask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(), Mask); in getTargetShuffleMask()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 6706 DecodePSHUFMask(NumElems, MaskEltSize, in getTargetShuffleMask()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 6998 DecodePSHUFMask(NumElems, MaskEltSize, ImmN, Mask); in getTargetShuffleMask()
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