| /external/capstone/arch/XCore/ |
| D | XCoreDisassembler.c | 67 uint64_t Address, const void *Decoder);
70 uint64_t Address, const void *Decoder);
73 uint64_t Address, const void *Decoder);
76 uint64_t Address, const void *Decoder);
79 uint64_t Address, const void *Decoder);
82 uint64_t Address, const void *Decoder);
85 uint64_t Address, const void *Decoder);
88 uint64_t Address, const void *Decoder);
91 uint64_t Address, const void *Decoder);
94 uint64_t Address, const void *Decoder);
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| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 79 const void *Decoder);
84 const void *Decoder);
87 uint64_t Address, const void *Decoder);
90 uint64_t Address, const void *Decoder);
95 const void *Decoder);
100 const void *Decoder);
105 const void *Decoder);
110 const void *Decoder);
115 const void *Decoder);
120 const void *Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 78 const void *Decoder);
83 const void *Decoder);
86 uint64_t Address, const void *Decoder);
89 uint64_t Address, const void *Decoder);
94 const void *Decoder);
99 const void *Decoder);
104 const void *Decoder);
109 const void *Decoder);
114 const void *Decoder);
119 const void *Decoder);
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| /external/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 78 const void *Decoder);
83 const void *Decoder);
86 uint64_t Address, const void *Decoder);
89 uint64_t Address, const void *Decoder);
94 const void *Decoder);
99 const void *Decoder);
104 const void *Decoder);
109 const void *Decoder);
114 const void *Decoder);
119 const void *Decoder);
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| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 45 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
48 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
51 unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder);
54 unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder);
57 unsigned RegNo, uint64_t Address, MCRegisterInfo *Decoder);
60 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
63 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
66 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
69 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
72 unsigned RegNo, uint64_t Address, const MCRegisterInfo *Decoder);
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 74 const void *Decoder);
79 const void *Decoder);
84 const void *Decoder);
89 const void *Decoder);
94 const void *Decoder);
99 const void *Decoder);
104 const void *Decoder);
109 const void *Decoder);
114 const void *Decoder);
119 const void *Decoder);
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| /external/capstone/arch/AArch64/ |
| D | AArch64Disassembler.c | 43 const void *Decoder);
47 const void *Decoder);
50 const void *Decoder);
53 const void *Decoder);
56 const void *Decoder);
59 const void *Decoder);
62 const void *Decoder);
65 const void *Decoder);
68 const void *Decoder);
71 const void *Decoder);
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| /external/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 85 const void *Decoder);
90 const void *Decoder);
95 const void *Decoder);
100 const void *Decoder);
105 const void *Decoder);
110 const void *Decoder);
115 const void *Decoder);
120 const void *Decoder);
125 const void *Decoder);
130 const void *Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 85 const void *Decoder);
90 const void *Decoder);
95 const void *Decoder);
100 const void *Decoder);
105 const void *Decoder);
110 const void *Decoder);
115 const void *Decoder);
120 const void *Decoder);
125 const void *Decoder);
130 const void *Decoder);
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| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 133 uint64_t Address, const void *Decoder);
135 unsigned RegNo, uint64_t Address, const void *Decoder);
137 unsigned RegNo, uint64_t Address, const void *Decoder);
139 uint64_t Address, const void *Decoder);
141 uint64_t Address, const void *Decoder);
143 uint64_t Address, const void *Decoder);
145 uint64_t Address, const void *Decoder);
147 uint64_t Address, const void *Decoder);
149 uint64_t Address, const void *Decoder);
151 uint64_t Address, const void *Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 42 const void *Decoder);
46 const void *Decoder);
49 const void *Decoder);
52 const void *Decoder);
55 const void *Decoder);
58 const void *Decoder);
61 const void *Decoder);
64 const void *Decoder);
67 const void *Decoder);
70 const void *Decoder);
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| /external/capstone/arch/Sparc/ |
| D | SparcDisassembler.c | 90 uint64_t Address, const void *Decoder) in DecodeIntRegsRegisterClass() argument
104 uint64_t Address, const void *Decoder) in DecodeI64RegsRegisterClass() argument
118 uint64_t Address, const void *Decoder) in DecodeFPRegsRegisterClass() argument
132 uint64_t Address, const void *Decoder) in DecodeDFPRegsRegisterClass() argument
146 uint64_t Address, const void *Decoder) in DecodeQFPRegsRegisterClass() argument
163 uint64_t Address, const void *Decoder) in DecodeFCCRegsRegisterClass() argument
175 const void *Decoder);
177 const void *Decoder);
179 const void *Decoder);
181 const void *Decoder);
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| /external/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 178 uint64_t Address, const void *Decoder);
180 uint64_t Address, const void *Decoder);
182 uint64_t Address, const void *Decoder);
184 uint64_t Address, const void *Decoder);
187 uint64_t Address, const void *Decoder);
190 const void *Decoder);
193 const void *Decoder);
196 const void *Decoder);
198 MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder);
200 uint64_t Address, const void *Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 178 uint64_t Address, const void *Decoder);
180 uint64_t Address, const void *Decoder);
182 uint64_t Address, const void *Decoder);
184 uint64_t Address, const void *Decoder);
187 const void *Decoder);
190 const void *Decoder);
193 const void *Decoder);
195 MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder);
197 uint64_t Address, const void *Decoder);
199 uint64_t Address, const void *Decoder);
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| /external/capstone/arch/TMS320C64x/ |
| D | TMS320C64xGenDisassemblerTables.inc | 615 uint64_t Address, void *Decoder) { \
621 if (DecodeNop(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
623 …if (DecodeCondRegister(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fa…
625 …if (DecodeCondRegisterZero(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassemble…
627 if (DecodeSide(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
629 …if (DecodeParallel(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fail; \
633 …if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassem…
635 …if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassem…
637 …if (DecodeGPRegsRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassem…
639 …if (DecodeCrosspathX2(MI, tmp, Address, Decoder) == MCDisassembler_Fail) return MCDisassembler_Fai…
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 35 const void *Decoder);
39 const void *Decoder);
42 const void *Decoder);
45 const void *Decoder);
48 const void *Decoder);
51 const void *Decoder);
54 const void *Decoder);
57 const void *Decoder);
60 const void *Decoder);
63 const void *Decoder);
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| /external/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 42 const void *Decoder);
46 const void *Decoder);
49 const void *Decoder);
52 const void *Decoder);
55 const void *Decoder);
58 const void *Decoder);
61 const void *Decoder);
64 const void *Decoder);
67 const void *Decoder);
70 const void *Decoder);
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 142 uint64_t Address, const void *Decoder);
145 const void *Decoder);
148 const void *Decoder);
150 uint64_t Address, const void *Decoder);
152 uint64_t Address, const void *Decoder);
154 uint64_t Address, const void *Decoder);
156 uint64_t Address, const void *Decoder);
158 uint64_t Address, const void *Decoder);
160 uint64_t Address, const void *Decoder);
162 uint64_t Address, const void *Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/ |
| D | RISCVDisassembler.cpp | 61 const void *Decoder) { in DecodeGPRRegisterClass() argument
63 static_cast<const MCDisassembler *>(Decoder) in DecodeGPRRegisterClass()
78 const void *Decoder) { in DecodeFPR32RegisterClass() argument
89 const void *Decoder) { in DecodeFPR32CRegisterClass() argument
100 const void *Decoder) { in DecodeFPR64RegisterClass() argument
111 const void *Decoder) { in DecodeFPR64CRegisterClass() argument
122 const void *Decoder) { in DecodeGPRNoX0RegisterClass() argument
127 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoX0RegisterClass()
132 const void *Decoder) { in DecodeGPRNoX0X2RegisterClass() argument
137 return DecodeGPRNoX0RegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoX0X2RegisterClass()
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| /external/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| D | RISCVDisassembler.cpp | 63 const void *Decoder) { in DecodeGPRRegisterClass() argument
65 static_cast<const MCDisassembler *>(Decoder) in DecodeGPRRegisterClass()
80 const void *Decoder) { in DecodeFPR16RegisterClass() argument
91 const void *Decoder) { in DecodeFPR32RegisterClass() argument
102 const void *Decoder) { in DecodeFPR32CRegisterClass() argument
113 const void *Decoder) { in DecodeFPR64RegisterClass() argument
124 const void *Decoder) { in DecodeFPR64CRegisterClass() argument
135 const void *Decoder) { in DecodeGPRNoX0RegisterClass() argument
140 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoX0RegisterClass()
145 const void *Decoder) { in DecodeGPRNoX0X2RegisterClass() argument
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 155 const void *Decoder) { in DecodeIntRegsRegisterClass() argument
166 const void *Decoder) { in DecodeI64RegsRegisterClass() argument
178 const void *Decoder) { in DecodeFPRegsRegisterClass() argument
190 const void *Decoder) { in DecodeDFPRegsRegisterClass() argument
202 const void *Decoder) { in DecodeQFPRegsRegisterClass() argument
216 const void *Decoder) { in DecodeCPRegsRegisterClass() argument
226 const void *Decoder) { in DecodeFCCRegsRegisterClass() argument
235 const void *Decoder) { in DecodeASRRegsRegisterClass() argument
244 const void *Decoder) { in DecodePRRegsRegisterClass() argument
252 uint64_t Address, const void *Decoder) { in DecodeIntPairRegisterClass() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 148 const void *Decoder) { in DecodeIntRegsRegisterClass() argument
159 const void *Decoder) { in DecodeI64RegsRegisterClass() argument
171 const void *Decoder) { in DecodeFPRegsRegisterClass() argument
183 const void *Decoder) { in DecodeDFPRegsRegisterClass() argument
195 const void *Decoder) { in DecodeQFPRegsRegisterClass() argument
209 const void *Decoder) { in DecodeCPRegsRegisterClass() argument
219 const void *Decoder) { in DecodeFCCRegsRegisterClass() argument
228 const void *Decoder) { in DecodeASRRegsRegisterClass() argument
237 const void *Decoder) { in DecodePRRegsRegisterClass() argument
245 uint64_t Address, const void *Decoder) { in DecodeIntPairRegisterClass() argument
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| /external/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 148 const void *Decoder) { in DecodeIntRegsRegisterClass() argument
159 const void *Decoder) { in DecodeI64RegsRegisterClass() argument
171 const void *Decoder) { in DecodeFPRegsRegisterClass() argument
183 const void *Decoder) { in DecodeDFPRegsRegisterClass() argument
195 const void *Decoder) { in DecodeQFPRegsRegisterClass() argument
209 const void *Decoder) { in DecodeCPRegsRegisterClass() argument
219 const void *Decoder) { in DecodeFCCRegsRegisterClass() argument
228 const void *Decoder) { in DecodeASRRegsRegisterClass() argument
237 const void *Decoder) { in DecodePRRegsRegisterClass() argument
245 uint64_t Address, const void *Decoder) { in DecodeIntPairRegisterClass() argument
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonDepDecoders.inc | 19 uint64_t, const void *Decoder) {
20 signedDecoder<8>(MI, tmp, Decoder);
24 uint64_t, const void *Decoder) {
25 signedDecoder<4>(MI, tmp, Decoder);
29 uint64_t, const void *Decoder) {
30 signedDecoder<12>(MI, tmp, Decoder);
34 uint64_t, const void *Decoder) {
35 signedDecoder<5>(MI, tmp, Decoder);
39 uint64_t, const void *Decoder) {
40 signedDecoder<13>(MI, tmp, Decoder);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonDepDecoders.inc | 19 uint64_t, const void *Decoder) {
20 signedDecoder<4>(MI, tmp, Decoder);
24 uint64_t, const void *Decoder) {
25 signedDecoder<14>(MI, tmp, Decoder);
29 uint64_t, const void *Decoder) {
30 signedDecoder<8>(MI, tmp, Decoder);
34 uint64_t, const void *Decoder) {
35 signedDecoder<7>(MI, tmp, Decoder);
39 uint64_t, const void *Decoder) {
40 signedDecoder<12>(MI, tmp, Decoder);
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|