| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 291 unsigned DefSubReg, in shareSameRegisterFile() argument
300 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
301 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
308 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
321 unsigned DefSubReg, in shouldRewriteCopySrc() argument
325 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
|
| D | PeepholeOptimizer.cpp | 298 unsigned DefSubReg; member in __anoncaae1f320111::ValueTracker
350 ValueTracker(unsigned Reg, unsigned DefSubReg, in ValueTracker() argument
354 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg), in ValueTracker()
369 ValueTracker(const MachineInstr &MI, unsigned DefIdx, unsigned DefSubReg, in ValueTracker() argument
373 : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg), in ValueTracker()
1672 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1691 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1749 if (RegSeqInput.SubIdx == DefSubReg) { in getNextSourceFromRegSequence()
1791 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1809 (TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 344 unsigned DefSubReg, in shareSameRegisterFile() argument
353 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
354 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
361 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
374 unsigned DefSubReg, in shouldRewriteCopySrc() argument
378 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
|
| D | PeepholeOptimizer.cpp | 373 unsigned DefSubReg; member in __anon1dd0dc540111::ValueTracker
418 ValueTracker(unsigned Reg, unsigned DefSubReg, in ValueTracker() argument
421 : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) { in ValueTracker()
1818 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1840 if (DefOp.getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1913 if (RegSeqInput.SubIdx == DefSubReg) in getNextSourceFromRegSequence()
1950 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1968 !(TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
1973 return ValueTrackerResult(BaseReg.Reg, DefSubReg); in getNextSourceFromInsertSubreg()
1984 if (DefSubReg) in getNextSourceFromExtractSubreg()
[all …]
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 364 unsigned DefSubReg, in shareSameRegisterFile() argument
373 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
374 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
381 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
394 unsigned DefSubReg, in shouldRewriteCopySrc() argument
398 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
|
| D | PeepholeOptimizer.cpp | 376 unsigned DefSubReg; member in __anond9421e600111::ValueTracker
421 ValueTracker(Register Reg, unsigned DefSubReg, in ValueTracker() argument
424 : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) { in ValueTracker()
1818 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1840 if (DefOp.getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1913 if (RegSeqInput.SubIdx == DefSubReg) in getNextSourceFromRegSequence()
1950 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1968 !(TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
1973 return ValueTrackerResult(BaseReg.Reg, DefSubReg); in getNextSourceFromInsertSubreg()
1984 if (DefSubReg) in getNextSourceFromExtractSubreg()
[all …]
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 74 unsigned DefSubReg,
|
| D | X86RegisterInfo.cpp | 215 unsigned DefSubReg, in shouldRewriteCopySrc() argument
221 if (DefRC->hasSuperClassEq(&X86::GR64RegClass) && DefSubReg == 0 && in shouldRewriteCopySrc()
225 return TargetRegisterInfo::shouldRewriteCopySrc(DefRC, DefSubReg, in shouldRewriteCopySrc()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 78 unsigned DefSubReg,
|
| D | X86RegisterInfo.cpp | 220 unsigned DefSubReg, in shouldRewriteCopySrc() argument
226 if (DefRC->hasSuperClassEq(&X86::GR64RegClass) && DefSubReg == 0 && in shouldRewriteCopySrc()
230 return TargetRegisterInfo::shouldRewriteCopySrc(DefRC, DefSubReg, in shouldRewriteCopySrc()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 136 unsigned DefSubReg,
|
| D | SIRegisterInfo.cpp | 809 unsigned DefSubReg, in shouldRewriteCopySrc() argument
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 182 unsigned DefSubReg,
|
| D | SIRegisterInfo.cpp | 1468 unsigned DefSubReg, in shouldRewriteCopySrc() argument
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 202 unsigned DefSubReg,
|
| D | SIRegisterInfo.cpp | 1879 unsigned DefSubReg, in shouldRewriteCopySrc() argument
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 518 unsigned DefSubReg,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 535 unsigned DefSubReg,
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 554 unsigned DefSubReg,
|