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Searched refs:DstMO (Results 1 – 17 of 17) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCVSXCopy.cpp98 MachineOperand &DstMO = MI->getOperand(0); in processBlock() local
101 if ( IsVSReg(DstMO.getReg(), MRI) && in processBlock()
126 } else if (!IsVSReg(DstMO.getReg(), MRI) && in processBlock()
132 IsVRReg(DstMO.getReg(), MRI) ? &PPC::VSHRCRegClass : in processBlock()
134 assert((IsF8Reg(DstMO.getReg(), MRI) || in processBlock()
135 IsVSFReg(DstMO.getReg(), MRI) || in processBlock()
136 IsVSSReg(DstMO.getReg(), MRI) || in processBlock()
137 IsVRReg(DstMO.getReg(), MRI)) && in processBlock()
148 SrcMO.setSubReg(IsVRReg(DstMO.getReg(), MRI) ? PPC::sub_128 : in processBlock()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCVSXCopy.cpp91 MachineOperand &DstMO = MI.getOperand(0); in processBlock() local
94 if ( IsVSReg(DstMO.getReg(), MRI) && in processBlock()
115 } else if (!IsVSReg(DstMO.getReg(), MRI) && in processBlock()
121 assert((IsF8Reg(DstMO.getReg(), MRI) || in processBlock()
122 IsVSFReg(DstMO.getReg(), MRI) || in processBlock()
123 IsVSSReg(DstMO.getReg(), MRI)) && in processBlock()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCVSXCopy.cpp91 MachineOperand &DstMO = MI.getOperand(0); in processBlock() local
94 if ( IsVSReg(DstMO.getReg(), MRI) && in processBlock()
115 } else if (!IsVSReg(DstMO.getReg(), MRI) && in processBlock()
121 assert((IsF8Reg(DstMO.getReg(), MRI) || in processBlock()
122 IsVSFReg(DstMO.getReg(), MRI) || in processBlock()
123 IsVSSReg(DstMO.getReg(), MRI)) && in processBlock()
/external/llvm-project/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp144 MachineOperand &DstMO = MI->getOperand(0); in LowerCopy() local
147 bool IdentityCopy = (SrcMO.getReg() == DstMO.getReg()); in LowerCopy()
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
DTwoAddressInstructionPass.cpp1328 MachineOperand &DstMO = MI->getOperand(DstIdx); in collectTiedOperands() local
1330 Register DstReg = DstMO.getReg(); in collectTiedOperands()
1338 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1362 const MachineOperand &DstMO = MI->getOperand(TiedPairs[tpi].second); in processTiedPairs() local
1363 IsEarlyClobber |= DstMO.isEarlyClobber(); in processTiedPairs()
1376 const MachineOperand &DstMO = MI->getOperand(DstIdx); in processTiedPairs() local
1377 Register RegA = DstMO.getReg(); in processTiedPairs()
DMachineSink.cpp927 const MachineOperand *SrcMO = nullptr, *DstMO = nullptr; in attemptDebugCopyProp() local
932 DstMO = CopyOperands->Destination; in attemptDebugCopyProp()
950 DbgMO.getSubReg() != DstMO->getSubReg())) in attemptDebugCopyProp()
956 if (PostRA && DbgMO.getReg() != DstMO->getReg()) in attemptDebugCopyProp()
/external/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp146 MachineOperand &DstMO = MI->getOperand(0); in LowerCopy() local
149 if (SrcMO.getReg() == DstMO.getReg()) { in LowerCopy()
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
DTwoAddressInstructionPass.cpp1414 MachineOperand &DstMO = MI->getOperand(DstIdx); in collectTiedOperands() local
1416 unsigned DstReg = DstMO.getReg(); in collectTiedOperands()
1424 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1448 const MachineOperand &DstMO = MI->getOperand(TiedPairs[tpi].second); in processTiedPairs() local
1449 IsEarlyClobber |= DstMO.isEarlyClobber(); in processTiedPairs()
1462 const MachineOperand &DstMO = MI->getOperand(DstIdx); in processTiedPairs() local
1463 unsigned RegA = DstMO.getReg(); in processTiedPairs()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp144 MachineOperand &DstMO = MI->getOperand(0); in LowerCopy() local
147 bool IdentityCopy = (SrcMO.getReg() == DstMO.getReg()); in LowerCopy()
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill()); in LowerCopy()
DTwoAddressInstructionPass.cpp1473 MachineOperand &DstMO = MI->getOperand(DstIdx); in collectTiedOperands() local
1475 Register DstReg = DstMO.getReg(); in collectTiedOperands()
1483 if (SrcMO.isUndef() && !DstMO.getSubReg()) { in collectTiedOperands()
1507 const MachineOperand &DstMO = MI->getOperand(TiedPairs[tpi].second); in processTiedPairs() local
1508 IsEarlyClobber |= DstMO.isEarlyClobber(); in processTiedPairs()
1521 const MachineOperand &DstMO = MI->getOperand(DstIdx); in processTiedPairs() local
1522 Register RegA = DstMO.getReg(); in processTiedPairs()
DMachineSink.cpp799 const MachineOperand *SrcMO = nullptr, *DstMO = nullptr; in attemptDebugCopyProp() local
804 DstMO = CopyOperands->Destination; in attemptDebugCopyProp()
822 DbgMO.getSubReg() != DstMO->getSubReg())) in attemptDebugCopyProp()
828 if (PostRA && DbgMO.getReg() != DstMO->getReg()) in attemptDebugCopyProp()
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZShortenInst.cpp180 MachineOperand &DstMO = MI.getOperand(0); in shortenFusedFPOp() local
184 if (SystemZMC::getFirstReg(DstMO.getReg()) < 16 && in shortenFusedFPOp()
188 DstMO.getReg() == AccMO.getReg()) { in shortenFusedFPOp()
/external/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp887 MachineOperand &DstMO = MIB->getOperand(SExtIdx); in mergePairedInsns() local
890 unsigned DstRegX = DstMO.getReg(); in mergePairedInsns()
894 DstMO.setReg(DstRegW); in mergePairedInsns()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp963 MachineOperand &DstMO = MIB->getOperand(SExtIdx); in mergePairedInsns() local
966 Register DstRegX = DstMO.getReg(); in mergePairedInsns()
970 DstMO.setReg(DstRegW); in mergePairedInsns()
DAArch64InstrInfo.cpp3301 const MachineOperand &DstMO = MI.getOperand(0); in foldMemoryOperandImpl() local
3303 Register DstReg = DstMO.getReg(); in foldMemoryOperandImpl()
3312 if (DstMO.getSubReg() == 0 && SrcMO.getSubReg() == 0) { in foldMemoryOperandImpl()
3334 if (IsSpill && DstMO.isUndef() && Register::isPhysicalRegister(SrcReg)) { in foldMemoryOperandImpl()
3339 switch (DstMO.getSubReg()) { in foldMemoryOperandImpl()
3381 if (IsFill && SrcMO.getSubReg() == 0 && DstMO.isUndef()) { in foldMemoryOperandImpl()
3383 switch (DstMO.getSubReg()) { in foldMemoryOperandImpl()
3406 LoadDst.setSubReg(DstMO.getSubReg()); in foldMemoryOperandImpl()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp963 MachineOperand &DstMO = MIB->getOperand(SExtIdx); in mergePairedInsns() local
966 Register DstRegX = DstMO.getReg(); in mergePairedInsns()
970 DstMO.setReg(DstRegW); in mergePairedInsns()
DAArch64InstrInfo.cpp3679 const MachineOperand &DstMO = MI.getOperand(0); in foldMemoryOperandImpl() local
3681 Register DstReg = DstMO.getReg(); in foldMemoryOperandImpl()
3690 if (DstMO.getSubReg() == 0 && SrcMO.getSubReg() == 0) { in foldMemoryOperandImpl()
3712 if (IsSpill && DstMO.isUndef() && Register::isPhysicalRegister(SrcReg)) { in foldMemoryOperandImpl()
3717 switch (DstMO.getSubReg()) { in foldMemoryOperandImpl()
3759 if (IsFill && SrcMO.getSubReg() == 0 && DstMO.isUndef()) { in foldMemoryOperandImpl()
3761 switch (DstMO.getSubReg()) { in foldMemoryOperandImpl()
3784 LoadDst.setSubReg(DstMO.getSubReg()); in foldMemoryOperandImpl()