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Searched refs:EHF_PRI_DESC (Results 1 – 7 of 7) sorted by relevance

/external/arm-trusted-firmware/plat/common/aarch64/
Dplat_ehf.c17 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_RAS_PRI),
22 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_CRITICAL_PRI),
25 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
28 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SP_PRI),
/external/arm-trusted-firmware/plat/imx/common/
Dimx_ehf.c14 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_CRITICAL_PRI),
17 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SDEI_NORMAL_PRI),
/external/arm-trusted-firmware/plat/socionext/synquacer/
Dsq_spm.c73 EHF_PRI_DESC(PLAT_PRI_BITS, PLAT_SP_PRI),
/external/arm-trusted-firmware/include/bl31/
Dehf.h28 #define EHF_PRI_DESC(plat_bits, priority) \ macro
/external/arm-trusted-firmware/plat/nvidia/tegra/include/
Dplatform_def.h102 #define PLAT_EHF_DESC EHF_PRI_DESC(PLAT_PRI_BITS,\
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_spm.c71 EHF_PRI_DESC(QEMU_PRI_BITS, PLAT_SP_PRI)
/external/arm-trusted-firmware/docs/components/
Dexception-handling.rst213 ``EHF_PRI_DESC()`` macro.
217 The macro ``EHF_PRI_DESC()`` installs the descriptors in the array at a
320 EHF_PRI_DESC(PLAT_PRI_BITS, DISP1_PRIO),
321 EHF_PRI_DESC(PLAT_PRI_BITS, DISP2_PRIO),
322 EHF_PRI_DESC(PLAT_PRI_BITS, DISP3_PRIO),