Searched refs:ENABLE_NxN (Results 1 – 7 of 7) sorted by relevance
205 #define ENABLE_NxN \ macro214 ((ENABLE_2Nx2N) | (ENABLE_NxN) | (ENABLE_2NxN) | (ENABLE_Nx2N) | (ENABLE_AMP))
135 ps_search_prms->i4_part_mask &= ((ENABLE_2Nx2N) | (ENABLE_NxN)); in hme_fullpel_cand_sifter()138 (ps_search_prms->i4_part_mask) & ((ENABLE_2Nx2N) | (ENABLE_NxN)), in hme_fullpel_cand_sifter()
327 [(!!(i4_part_mask & (ENABLE_SMP | ENABLE_NxN)) && in hme_get_calc_sad_and_result_fxn()329 ? (!!(i4_part_mask & ENABLE_NxN) ? 0 : 1) in hme_get_calc_sad_and_result_fxn()
992 #define ENABLE_NxN \ macro1002 ((ENABLE_2Nx2N) | (ENABLE_NxN) | (ENABLE_2NxN) | (ENABLE_Nx2N) | (ENABLE_AMP))1003 #define ENABLE_SQUARE_PARTS ((ENABLE_2Nx2N) | (ENABLE_NxN))
193 (ENABLE_2Nx2N), (ENABLE_2NxN), (ENABLE_Nx2N), (ENABLE_NxN),
475 (ps_search_results->i4_part_mask & ENABLE_NxN)) in hme_map_mvs_to_grid()933 return ((i4_ret | ENABLE_NxN)); in hme_study_input_segmentation()938 return (i4_ret | ENABLE_NxN | i4_seg_lutr[i4_max_ridx] | i4_seg_lutc[i4_max_cidx]); in hme_study_input_segmentation()3279 if(!(ps_search_results->i4_part_mask & ENABLE_NxN)) in hme_populate_pus_8x8_cu()5673 return ENABLE_NxN; in hme_part_mask_populator()
997 S32 i4_part_mask = ENABLE_ALL_PARTS - ENABLE_NxN; in hme_try_merge_high_speed()1575 ASSERT((ps_search_results->i4_part_mask & (ENABLE_NxN)) == (ENABLE_NxN)); in hme_update_mv_bank_noencode()1712 (ps_search_results->i4_part_mask & ENABLE_NxN)) in hme_update_mv_bank_encode()1996 ASSERT((ps_search_results->i4_part_mask & (ENABLE_NxN)) == (ENABLE_NxN)); in hme_update_mv_bank_in_l1_me()8009 if((ps_search_results->i4_part_mask & ENABLE_NxN) || intra_8x8_enabled) in hme_refine()8985 i4_mask |= (ENABLE_NxN); in hme_refine_no_encode()