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Searched refs:ENABLE_STENCIL_WRITE_MASK (Results 1 – 14 of 14) sorted by relevance

/external/igt-gpu-tools/lib/
Drendercopy_i915.c65 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | in gen3_render_copyfunc()
Di915_reg.h456 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro
Di830_reg.h516 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro
/external/mesa3d/src/mesa/drivers/dri/i915/
Di915_reg.h344 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro
Di830_reg.h399 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro
Di830_state.c86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK | in i830StencilMaskSeparate()
1020 ENABLE_STENCIL_WRITE_MASK | in i830_init_packets()
Di915_state.c111 ENABLE_STENCIL_WRITE_MASK | in i915_update_stencil()
948 ENABLE_STENCIL_WRITE_MASK | in i915_init_packets()
/external/igt-gpu-tools/tests/i915/
Dgen3_render_linear_blits.c123 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | in copy()
Dgen3_render_tiledy_blits.c122 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | in copy()
Dgen3_render_tiledx_blits.c122 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | in copy()
Dgen3_render_mixed_blits.c125 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | in copy()
Dgen3_mixed_blits.c130 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | in render_copy()
/external/mesa3d/src/gallium/drivers/i915/
Di915_reg.h465 #define ENABLE_STENCIL_WRITE_MASK (1<<16) macro
Di915_state.c474 ENABLE_STENCIL_WRITE_MASK | in i915_create_depth_stencil_state()