| /external/ltp/include/ |
| D | tst_common.h | 37 #define TST_RETRY_FUNC(FUNC, ERET) \ argument
38 TST_RETRY_FN_EXP_BACKOFF(FUNC, ERET, 1)
40 #define TST_RETRY_FN_EXP_BACKOFF(FUNC, ERET, MAX_DELAY) \ argument
46 if (tst_ret_ == ERET) \
55 ERET; \
|
| /external/llvm-project/llvm/test/MC/Mips/ |
| D | mips-control-instructions.s | 11 # CHECK32-NEXT: # <MCInst #{{[0-9]+}} ERET
46 # CHECK64-NEXT: # <MCInst #{{[0-9]+}} ERET
|
| /external/OpenCSD/decoder/tests/snapshots-ete/infrastructure/ |
| D | README-TEST-NOTES.txt | 8 Running this on the library may will cause errors on ERET packets unless the debug define
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | virtexts-thumb.s | 52 # SUBS PC, LR, #0 should have the same encoding as ERET.
|
| /external/llvm/test/MC/ARM/ |
| D | virtexts-thumb.s | 52 # SUBS PC, LR, #0 should have the same encoding as ERET.
|
| /external/arm-trusted-firmware/docs/components/ |
| D | secure-partition-manager-mm.rst | 269 ERET instruction.
284 instruction (ERET) to S-EL0. Later, the Secure Partition issues an SVC
296 An ERET instruction is used by TF-A to return to S-EL0 with the result of the
395 used as the target of the ERET instruction to start initialisation of the Secure
467 SPM will invoke the entry point of a service by executing an ERET instruction.
593 syndrome information can be used to return control through an ERET
|
| D | exception-handling.rst | 388 through an ``ERET``, resumes execution before the interrupt occurred.
396 enter a lower EL upon the next ``ERET``.
398 #. Through the ensuing ``ERET`` from runtime firmware, execution is delegated
|
| D | secure-partition-manager.rst | 728 - SPMD=>SPMC direct message request uses ERET conduit
733 - SPMD=>SPMC direct message response uses ERET conduit
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 533 BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET)); in expandERet()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMScheduleM7.td | 190 "t2HVC", "t2SMC", "t2UDF", "ERET",
|
| D | ARMScheduleA57.td | 118 "(t2)?CPS[123]p$", "(t2)?DBG$", "(t2)?DMB$", "(t2)?DSB$", "ERET$",
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 692 BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET)); in expandERet()
|
| D | MipsScheduleP5600.td | 74 DERET, ERET, ERet, ERETNC, J, JR, JR_HB,
|
| D | MipsScheduleGeneric.td | 287 BLEZ, BLTZ, BLTZAL, J, JALX, JR, JR_HB, ERET,
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 706 BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET)); in expandERet()
|
| D | MipsScheduleP5600.td | 75 DERET, ERET, ERet, ERETNC, J, JR, JR_HB,
|
| D | MipsScheduleGeneric.td | 287 BLEZ, BLTZ, BLTZAL, J, JALX, JR, JR_HB, ERET,
|
| /external/OpenCSD/decoder/tests/snapshots/TC2/pkt_proc_logs/ |
| D | trc_pkt_lister_0x13.ppl | 588 Idx:28058; ID:13; ERET : Exception return packet;
1004 Idx:29198; ID:13; ERET : Exception return packet;
1026 Idx:29302; ID:13; ERET : Exception return packet;
1809 Idx:32420; ID:13; ERET : Exception return packet;
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SchedFalkorDetails.td | 1260 def : InstRW<[FalkorWr_2LD_1Z_3cyc], (instrs ERET)>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedFalkorDetails.td | 1260 def : InstRW<[FalkorWr_2LD_1Z_3cyc], (instrs ERET)>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleA57.td | 130 "(t2)?CPS[123]p$", "(t2)?DBG$", "(t2)?DMB$", "(t2)?DSB$", "ERET$",
|
| /external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/ |
| D | test_TARMAC | 5561 2278 clk cpu0 IT (2242) 000184ec:0000100184ec d69f03e0 O EL3h_s : ERET
8825 3543 clk cpu0 IT (3507) 00020ce4:000010020ce4_NS d69f03e0 O EL2h_n : ERET
12199 4903 clk cpu0 IT (4867) 00040574:000010040574_NS d69f03e0 O EL1h_n : ERET
17080 7006 clk cpu0 IT (6970) 0001586c:00001001586c d69f03e0 O EL3h_s : ERET
17118 7013 clk cpu0 IT (6977) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET
17528 7151 clk cpu0 IT (7115) 0001d050:00001001d050_NS d69f03e0 O EL2h_n : ERET
17564 7159 clk cpu0 IT (7123) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET
17801 7244 clk cpu0 IT (7208) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET
19027 7784 clk cpu0 IT (7748) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET
20880 8565 clk cpu0 IT (8529) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1369 4305285U, // ERET
5593 0U, // ERET
9229 // BX_RET, ERET, FMSTAT, MOVPCLR, MVE_LCTP, VSCCLRMD, VSCCLRMS, t2CLREX, ...
9432 // BKPT, BL, BLX, BLXi, BX, CPS1p, ERET, HLT, HVC, MVE_LETP, RFEDA, RFEDB...
|
| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 121 432735U, // ERET
2925 0U, // ERET
6137 // BX_RET, ERET, FMSTAT, MOVPCLR, t2CLREX, t2DCPS1, t2DCPS2, t2DCPS3, tBL...
6264 // BKPT, BL, BLX, BLXi, BX, CPS1p, ERET, HLT, HVC, RFEDA, RFEDB, RFEIA, R...
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSubtargetInfo.inc | 2667 {DBGFIELD("ERET") 1, false, false, 9, 3, 0, 1, 0, 0}, // #685
3781 {DBGFIELD("ERET") 1, false, false, 10, 1, 5, 1, 0, 0}, // #685
4895 {DBGFIELD("ERET") 1, false, false, 7, 1, 5, 1, 0, 0}, // #685
6009 {DBGFIELD("ERET") 1, false, false, 245, 2, 5, 1, 0, 0}, // #685
7123 {DBGFIELD("ERET") 1, false, false, 226, 2, 5, 1, 0, 0}, // #685
8237 {DBGFIELD("ERET") 1, false, false, 575, 3, 5, 1, 0, 0}, // #685
9351 {DBGFIELD("ERET") 3, false, false, 887, 5, 137, 1, 0, 0}, // #685
10465 {DBGFIELD("ERET") 3, false, false, 1065, 3, 137, 1, 0, 0}, // #685
11579 {DBGFIELD("ERET") 1, false, false, 10, 1, 5, 1, 0, 0}, // #685
12693 {DBGFIELD("ERET") 2, false, false, 1081, 3, 5, 1, 0, 0}, // #685
|