Searched refs:ERXPFGCTL_EL1 (Results 1 – 6 of 6) sorted by relevance
/external/llvm-project/llvm/test/MC/AArch64/ |
D | armv8.4a-ras.s | 10 msr ERXPFGCTL_EL1, x0 11 mrs x0,ERXPFGCTL_EL1
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/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | armv8.4a-ras.txt | 14 #CHECK: msr ERXPFGCTL_EL1, x0 15 #CHECK: mrs x0, ERXPFGCTL_EL1
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/external/arm-trusted-firmware/include/arch/aarch64/ |
D | arch.h | 1011 #define ERXPFGCTL_EL1 S3_0_C5_C4_5 macro
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenSystemOperands.inc | 857 ERXPFGCTL_EL1 = 49829, 2921 { "ERXPFGCTL_EL1", 0xC2A5, true, true, {AArch64::FeatureRASv8_4} }, // 667 3246 { "ERXPFGCTL_EL1", 667 },
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 1334 def : RWSysReg<"ERXPFGCTL_EL1", 0b11, 0b000, 0b0101, 0b0100, 0b101>;
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 1338 def : RWSysReg<"ERXPFGCTL_EL1", 0b11, 0b000, 0b0101, 0b0100, 0b101>;
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