| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 301 unsigned ExtendOp = TargetOpcode::G_ANYEXT; in lowerReturn() local
304 ExtendOp = TargetOpcode::G_SEXT; in lowerReturn()
307 ExtendOp = TargetOpcode::G_ZEXT; in lowerReturn()
329 CurVReg = MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}) in lowerReturn()
348 MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}).getReg(0); in lowerReturn()
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64CallLowering.cpp | 319 unsigned ExtendOp = TargetOpcode::G_ANYEXT; in lowerReturn() local
322 ExtendOp = TargetOpcode::G_SEXT; in lowerReturn()
325 ExtendOp = TargetOpcode::G_ZEXT; in lowerReturn()
346 CurVReg = MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}) in lowerReturn()
365 MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}).getReg(0); in lowerReturn()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 310 unsigned ExtendOp = TargetOpcode::G_ANYEXT; in splitToValueTypes() local
313 ExtendOp = TargetOpcode::G_SEXT; in splitToValueTypes()
316 ExtendOp = TargetOpcode::G_ZEXT; in splitToValueTypes()
320 extOpcodeToISDExtOpcode(ExtendOp)); in splitToValueTypes()
325 Reg = B.buildInstr(ExtendOp, {LLTy}, {Reg}).getReg(0); in splitToValueTypes()
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| D | AMDGPURegisterBankInfo.cpp | 2446 unsigned ExtendOp = minMaxToExtend(MI.getOpcode()); in applyMappingImpl() local
2448 std::tie(WideSrc0Lo, WideSrc0Hi) = unpackV2S16ToS32(B, Src0, ExtendOp); in applyMappingImpl()
2449 std::tie(WideSrc1Lo, WideSrc1Hi) = unpackV2S16ToS32(B, Src1, ExtendOp); in applyMappingImpl()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 854 unsigned ExtendOp = in LegalizeLoadOps() local
856 Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load); in LegalizeLoadOps()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 891 unsigned ExtendOp = in LegalizeLoadOps() local
893 Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load); in LegalizeLoadOps()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 890 unsigned ExtendOp = in LegalizeLoadOps() local
892 Value = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load); in LegalizeLoadOps()
|
| D | TargetLowering.cpp | 6929 unsigned ExtendOp = ISD::getExtForLoadExtType(false, ExtType); in scalarizeVectorLoad() local
6930 Scalar = DAG.getNode(ExtendOp, SL, DstEltVT, Scalar); in scalarizeVectorLoad()
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 246 struct ExtendOp { struct in __anon6528055b0211::AArch64Operand
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 402 struct ExtendOp { struct in __anon1914c67d0111::AArch64Operand
|
| /external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 436 struct ExtendOp { struct in __anona500a0890111::AArch64Operand
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 8024 unsigned ExtendOp = in LowerINT_TO_FPVector() local
8033 Extend = DAG.getNode(ExtendOp, dl, IntermediateVT, Arrange); in LowerINT_TO_FPVector()
|
| /external/llvm/lib/Analysis/ |
| D | ScalarEvolution.cpp | 1188 template <typename ExtendOp> struct ExtendOpTraits {
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | ScalarEvolution.cpp | 1390 template <typename ExtendOp> struct ExtendOpTraits {
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20850 unsigned ExtendOp = in EmitCmp() local
20860 ExtendOp = ISD::SIGN_EXTEND; in EmitCmp()
20866 ExtendOp = ISD::SIGN_EXTEND; in EmitCmp()
20871 Op0 = DAG.getNode(ExtendOp, dl, CmpVT, Op0); in EmitCmp()
20872 Op1 = DAG.getNode(ExtendOp, dl, CmpVT, Op1); in EmitCmp()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 22092 unsigned ExtendOp = in EmitCmp() local
22102 ExtendOp = ISD::SIGN_EXTEND; in EmitCmp()
22108 ExtendOp = ISD::SIGN_EXTEND; in EmitCmp()
22113 Op0 = DAG.getNode(ExtendOp, dl, CmpVT, Op0); in EmitCmp()
22114 Op1 = DAG.getNode(ExtendOp, dl, CmpVT, Op1); in EmitCmp()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 14875 unsigned ExtendOp = in EmitCmp() local
14877 Op0 = DAG.getNode(ExtendOp, dl, MVT::i32, Op0); in EmitCmp()
14878 Op1 = DAG.getNode(ExtendOp, dl, MVT::i32, Op1); in EmitCmp()
|
| /external/llvm-project/llvm/lib/Analysis/ |
| D | ScalarEvolution.cpp | 1275 template <typename ExtendOp> struct ExtendOpTraits {
|