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Searched refs:F16C (Results 1 – 25 of 55) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/X86/
Dhalf-constrained.ll3 ; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefix=X32-F16C
5 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=f16c | FileCheck %s --check-prefix=X64-F16C
22 ; X32-F16C-LABEL: half_to_float:
23 ; X32-F16C: ## %bb.0:
24 ; X32-F16C-NEXT: subl $12, %esp
25 ; X32-F16C-NEXT: .cfi_def_cfa_offset 16
26 ; X32-F16C-NEXT: movzwl _a, %eax
27 ; X32-F16C-NEXT: movl %eax, (%esp)
28 ; X32-F16C-NEXT: calll ___extendhfsf2
29 ; X32-F16C-NEXT: addl $12, %esp
[all …]
Dpr31088.ll4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c | FileCheck %s --check-prefix=F16C
43 ; F16C-LABEL: ir_fadd_v1f16:
44 ; F16C: # %bb.0:
45 ; F16C-NEXT: movzwl %si, %eax
46 ; F16C-NEXT: vmovd %eax, %xmm0
47 ; F16C-NEXT: vcvtph2ps %xmm0, %xmm0
48 ; F16C-NEXT: movzwl %di, %eax
49 ; F16C-NEXT: vmovd %eax, %xmm1
50 ; F16C-NEXT: vcvtph2ps %xmm1, %xmm1
51 ; F16C-NEXT: vaddss %xmm0, %xmm1, %xmm0
[all …]
Dhalf.ll7 ; RUN: | FileCheck %s -check-prefixes=CHECK,BWON,BWON-F16C
80 ; BWON-F16C-LABEL: test_extend32:
81 ; BWON-F16C: # %bb.0:
82 ; BWON-F16C-NEXT: movzwl (%rdi), %eax
83 ; BWON-F16C-NEXT: vmovd %eax, %xmm0
84 ; BWON-F16C-NEXT: vcvtph2ps %xmm0, %xmm0
85 ; BWON-F16C-NEXT: retq
111 ; BWON-F16C-LABEL: test_extend64:
112 ; BWON-F16C: # %bb.0:
113 ; BWON-F16C-NEXT: movzwl (%rdi), %eax
[all …]
Dcvt16.ll3 … < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=F16C
9 ; If flag -soft-float is set, or if there is no F16C support, then:
17 ; Otherwise (we have F16C support):
37 ; F16C-LABEL: test1:
38 ; F16C: # %bb.0:
39 ; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
40 ; F16C-NEXT: vpextrw $0, %xmm0, (%rdi)
41 ; F16C-NEXT: retq
65 ; F16C-LABEL: test2:
66 ; F16C: # %bb.0:
[all …]
Dfastmath-float-half-conversion.ll2 …iple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s --check-prefix=ALL --check-prefix=F16C
6 ; F16C-LABEL: test1_fast:
7 ; F16C: # %bb.0: # %entry
8 ; F16C-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
9 ; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
10 ; F16C-NEXT: vmovd %xmm0, %eax
11 ; F16C-NEXT: # kill: def $ax killed $ax killed $eax
12 ; F16C-NEXT: retq
28 ; F16C-LABEL: test2_fast:
29 ; F16C: # %bb.0: # %entry
[all …]
/external/llvm/test/CodeGen/X86/
Dhalf.ll6 ; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C -check-prefix=BWON
41 ; CHECK-F16C: vcvtph2ps
52 ; CHECK-F16C: vcvtph2ps
53 ; CHECK-F16C: vcvtss2sd
63 ; CHECK-F16C: vcvtps2ph
73 ; CHECK-F16C: callq __truncdfhf2
89 ; CHECK-F16C-NEXT: movswl (%rdi), [[REG0:%[a-z0-9]+]]
90 ; CHECK-F16C-NEXT: vmovd [[REG0]], [[REG1:%[a-z0-9]+]]
91 ; CHECK-F16C-NEXT: vcvtph2ps [[REG1]], [[REG2:%[a-z0-9]+]]
92 ; CHECK-F16C-NEXT: vcvttss2si [[REG2]], %rax
[all …]
Dcvt16.ll2 …4-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C
8 ; If flag -soft-float is set, or if there is no F16C support, then:
16 ; Otherwise (we have F16C support):
31 ; F16C: vcvtps2ph
43 ; F16C: vcvtph2ps
44 ; F16C: ret
58 ; F16C: vcvtps2ph
59 ; F16C-NEXT: vcvtph2ps
60 ; F16C: ret
72 ; F16C: vcvtph2ps
[all …]
Dfastmath-float-half-conversion.ll1 …iple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s --check-prefix=ALL --check-prefix=F16C
6 ; F16C-NOT: callq {{_+}}truncdfhf2
7 ; F16C: vcvtsd2ss %xmm0, %xmm0, %xmm0
8 ; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
18 ; F16C-NOT: callq {{_+}}truncxfhf2
19 ; F16C: fldt
20 ; F16C-NEXT: fstps
21 ; F16C-NEXT: vmovss
22 ; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
/external/skqp/src/core/
DSkCpu.h22 F16C = 1 << 7, enumerator
28 HSW = AVX2 | BMI1 | BMI2 | F16C | FMA,
DSkCpu.cpp51 if (abcd[2] & (1<<29)) { features |= SkCpu::F16C; } in read_cpu_features()
/external/skia/src/core/
DSkCpu.h22 F16C = 1 << 7, enumerator
28 HSW = AVX2 | BMI1 | BMI2 | F16C | FMA,
DSkCpu.cpp53 if (abcd[2] & (1<<29)) { features |= SkCpu::F16C; } in read_cpu_features()
/external/igt-gpu-tools/lib/
Digt_halffloat.c199 if (igt_x86_features() & F16C) in resolve_float_to_half()
210 if (igt_x86_features() & F16C) in resolve_half_to_float()
Digt_x86.h42 #define F16C 0x200 macro
Digt_x86.c147 features |= F16C; in igt_x86_features()
184 if (features & F16C) in igt_x86_features_to_string()
/external/tensorflow/tensorflow/core/platform/
Dcpu_info.h90 F16C = 16, enumerator
Dcpu_info.cc231 case F16C: return cpuid->have_f16c_; in TestFeature()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Disa.hpp107 bool F16C(void) { return CPU_Rep.f_1_ECX_[29]; } in F16C() function in InstructionSet
/external/tensorflow/tensorflow/lite/tools/cmake/modules/
Deigen.cmake84 set(EIGEN_TEST_F16C OFF CACHE BOOL "Disable F16C test.")
/external/llvm-project/llvm/include/llvm/Support/
DX86TargetParser.def156 X86_FEATURE (F16C, "f16c")
/external/eigen/
DCMakeLists.txt239 option(EIGEN_TEST_F16C "Enable/Disable F16C in tests/examples" OFF)
242 message(STATUS "Enabling F16C in tests/examples")
/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
DJitManager.cpp105 if (mArch.F16C()) in JitManager()
Dbuilder_misc.cpp706 if (JM()->mArch.F16C()) in CVTPS2PH()
/external/icu/icu4c/source/data/unidata/
DDerivedNormalizationProps.txt650 1F16C ; FC_NFKC; 006D 0072
1684 1F16A..1F16C ; NFKD_QC; N
2088 1F16A..1F16C ; NFKC_QC; N
2738 1F16A..1F16C ; Expands_On_NFKD
2877 1F16A..1F16C ; Expands_On_NFKC
8219 1F16C ; NFKC_CF; 006D 0072
9811 1F16A..1F16C ; Changes_When_NFKC_Casefolded
/external/icu/icu4c/source/data/unidata/norm2/
Dnfkc.txt3635 1F16C>004D 0052

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