/external/pcre/dist2/src/sljit/ |
D | sljitNativeSPARC_common.c | 140 #define FADDS (OPC1(0x2) | OPC3(0x34) | DOP(0x41)) macro 1213 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FADDS, FADDD) | FD(dst_r) | FS1(src1) | FS2(src2), MOVA… in sljit_emit_fop2()
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D | sljitNativePPC_common.c | 170 #define FADDS (HI(59) | LO(21)) macro 1844 FAIL_IF(push_inst(compiler, SELECT_FOP(op, FADDS, FADD) | FD(dst_r) | FA(src1) | FB(src2))); in sljit_emit_fop2()
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/external/llvm/lib/Target/Sparc/ |
D | LeonPasses.cpp | 859 case SP::FADDS: in runOnMachineFunction()
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D | SparcInstrInfo.td | 1201 def FADDS : F3_3<2, 0b110100, 0b001000001,
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 212 FADDS, enumerator
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D | X86IntrinsicsInfo.h | 458 X86ISD::FADDS, X86ISD::FADDS_RND), 460 X86ISD::FADDS, X86ISD::FADDS_RND),
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D | X86InstrFragmentsSIMD.td | 514 def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 464 X86ISD::FADDS, X86ISD::FADDS_RND), 466 X86ISD::FADDS, X86ISD::FADDS_RND),
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D | X86ISelLowering.h | 207 FADD_RND, FADDS, FADDS_RND, enumerator
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D | X86InstrFragmentsSIMD.td | 505 def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>;
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 203 case PPC::FADDS: in isAssociativeAndCommutative()
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/external/llvm-project/llvm/lib/Target/VE/ |
D | VEInstrInfo.td | 586 // e.g. FADDD, FADDS, FSUBD, and etc. 1341 defm FADDS : RRFm<"fadd.s", 0x4C, F32, f32, fadd, simm7fp, mimmfp32>;
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 246 case PPC::FADDS: in isAssociativeAndCommutative() 295 {PPC::FMADDS, PPC::FADDS, PPC::FMULS, 3, 1}};
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/external/llvm-project/llvm/docs/ |
D | CodeGenerator.rst | 1006 (FMADDS (FADDS W, X), Y, Z) 1010 The ``FADDS`` instruction is a simple binary single-precision add instruction. 1022 def FADDS : AForm_2<59, 21,
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/external/llvm/docs/ |
D | CodeGenerator.rst | 978 (FMADDS (FADDS W, X), Y, Z) 982 The ``FADDS`` instruction is a simple binary single-precision add instruction. 994 def FADDS : AForm_2<59, 21,
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenMCCodeEmitter.inc | 896 UINT64_C(3959423018), // FADDS 3400 case PPC::FADDS: 7306 CEFBS_None, // FADDS = 883
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D | PPCGenFastISel.inc | 1931 return fastEmitInst_rr(PPC::FADDS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
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D | PPCGenInstrInfo.inc | 898 FADDS = 883, 3867 …Commutable), 0x18ULL, ImplicitList18, nullptr, OperandInfo111, -1 ,nullptr }, // Inst #883 = FADDS 12629 { PPC::FADDS_rec, PPC::FADDS }, 12831 { PPC::FADDS, PPC::FADDS_rec },
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D | PPCGenAsmWriter.inc | 2551 25525U, // FADDS 4842 38U, // FADDS
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/external/capstone/arch/Sparc/ |
D | SparcGenDisassemblerTables.inc | 608 /* 2337 */ MCD_OPC_Decode, 143, 1, 26, // Opcode: FADDS
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 1209 def FADDS : F3_3<2, 0b110100, 0b001000001,
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/external/llvm-project/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 1209 def FADDS : F3_3<2, 0b110100, 0b001000001,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 237 case PPC::FADDS: in isAssociativeAndCommutative()
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/external/capstone/arch/PowerPC/ |
D | PPCGenAsmWriter.inc | 501 22583U, // FADDS 2023 0U, // FADDS
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D | PPCGenDisassemblerTables.inc | 1599 /* 6603 */ MCD_OPC_Decode, 225, 3, 87, // Opcode: FADDS
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