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Searched refs:FADDS (Results 1 – 25 of 36) sorted by relevance

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/external/pcre/dist2/src/sljit/
DsljitNativeSPARC_common.c140 #define FADDS (OPC1(0x2) | OPC3(0x34) | DOP(0x41)) macro
1213 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FADDS, FADDD) | FD(dst_r) | FS1(src1) | FS2(src2), MOVA… in sljit_emit_fop2()
DsljitNativePPC_common.c170 #define FADDS (HI(59) | LO(21)) macro
1844 FAIL_IF(push_inst(compiler, SELECT_FOP(op, FADDS, FADD) | FD(dst_r) | FA(src1) | FB(src2))); in sljit_emit_fop2()
/external/llvm/lib/Target/Sparc/
DLeonPasses.cpp859 case SP::FADDS: in runOnMachineFunction()
DSparcInstrInfo.td1201 def FADDS : F3_3<2, 0b110100, 0b001000001,
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h212 FADDS, enumerator
DX86IntrinsicsInfo.h458 X86ISD::FADDS, X86ISD::FADDS_RND),
460 X86ISD::FADDS, X86ISD::FADDS_RND),
DX86InstrFragmentsSIMD.td514 def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h464 X86ISD::FADDS, X86ISD::FADDS_RND),
466 X86ISD::FADDS, X86ISD::FADDS_RND),
DX86ISelLowering.h207 FADD_RND, FADDS, FADDS_RND, enumerator
DX86InstrFragmentsSIMD.td505 def X86fadds : SDNode<"X86ISD::FADDS", SDTFPBinOp>;
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp203 case PPC::FADDS: in isAssociativeAndCommutative()
/external/llvm-project/llvm/lib/Target/VE/
DVEInstrInfo.td586 // e.g. FADDD, FADDS, FSUBD, and etc.
1341 defm FADDS : RRFm<"fadd.s", 0x4C, F32, f32, fadd, simm7fp, mimmfp32>;
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp246 case PPC::FADDS: in isAssociativeAndCommutative()
295 {PPC::FMADDS, PPC::FADDS, PPC::FMULS, 3, 1}};
/external/llvm-project/llvm/docs/
DCodeGenerator.rst1006 (FMADDS (FADDS W, X), Y, Z)
1010 The ``FADDS`` instruction is a simple binary single-precision add instruction.
1022 def FADDS : AForm_2<59, 21,
/external/llvm/docs/
DCodeGenerator.rst978 (FMADDS (FADDS W, X), Y, Z)
982 The ``FADDS`` instruction is a simple binary single-precision add instruction.
994 def FADDS : AForm_2<59, 21,
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenMCCodeEmitter.inc896 UINT64_C(3959423018), // FADDS
3400 case PPC::FADDS:
7306 CEFBS_None, // FADDS = 883
DPPCGenFastISel.inc1931 return fastEmitInst_rr(PPC::FADDS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DPPCGenInstrInfo.inc898 FADDS = 883,
3867 …Commutable), 0x18ULL, ImplicitList18, nullptr, OperandInfo111, -1 ,nullptr }, // Inst #883 = FADDS
12629 { PPC::FADDS_rec, PPC::FADDS },
12831 { PPC::FADDS, PPC::FADDS_rec },
DPPCGenAsmWriter.inc2551 25525U, // FADDS
4842 38U, // FADDS
/external/capstone/arch/Sparc/
DSparcGenDisassemblerTables.inc608 /* 2337 */ MCD_OPC_Decode, 143, 1, 26, // Opcode: FADDS
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.td1209 def FADDS : F3_3<2, 0b110100, 0b001000001,
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcInstrInfo.td1209 def FADDS : F3_3<2, 0b110100, 0b001000001,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp237 case PPC::FADDS: in isAssociativeAndCommutative()
/external/capstone/arch/PowerPC/
DPPCGenAsmWriter.inc501 22583U, // FADDS
2023 0U, // FADDS
DPPCGenDisassemblerTables.inc1599 /* 6603 */ MCD_OPC_Decode, 225, 3, 87, // Opcode: FADDS

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