/external/mesa3d/src/mesa/x86/ |
D | x86_xform2.S | 127 FADD_S( MAT12 ) 129 FADD_S( MAT13 ) 131 FADD_S( MAT14 ) 133 FADD_S( MAT15 ) 278 FADD_S( MAT12 ) 280 FADD_S( MAT13 ) 282 FADD_S( MAT14 ) 350 FADD_S( MAT12 ) 425 FADD_S( MAT12 ) 427 FADD_S( MAT13 ) [all …]
|
D | x86_xform3.S | 143 FADD_S( MAT12 ) 145 FADD_S( MAT13 ) 147 FADD_S( MAT14 ) 149 FADD_S( MAT15 ) 321 FADD_S( MAT12 ) 323 FADD_S( MAT13 ) 325 FADD_S( MAT14 ) 394 FADD_S( MAT12 ) 472 FADD_S( MAT12 ) 474 FADD_S( MAT13 ) [all …]
|
D | assyntax.h | 690 #define FADD_S(a) CHOICE(fadds a, fadds a, fadds a) macro 1403 #define FADD_S(a) fadd S_(a) macro
|
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ |
D | float_arithmetic_operations.mir | 30 ; FP32: [[FADD_S:%[0-9]+]]:fgr32 = FADD_S [[COPY]], [[COPY1]] 31 ; FP32: $f0 = COPY [[FADD_S]] 37 ; FP64: [[FADD_S:%[0-9]+]]:fgr32 = FADD_S [[COPY]], [[COPY1]] 38 ; FP64: $f0 = COPY [[FADD_S]]
|
/external/llvm-project/llvm/test/DebugInfo/MIR/Mips/ |
D | live-debug-values-reg-copy.mir | 212 renamable $f0 = FADD_S killed renamable $f0, killed renamable $f1, debug-location !19 225 renamable $f24 = FADD_S killed renamable $f12, killed renamable $f0, debug-location !19 236 renamable $f0 = FADD_S killed renamable $f25, killed renamable $f0, debug-location !19
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoF.td | 133 def FADD_S : FPALUS_rr_frm<0b0000000, "fadd.s">, 135 def : FPALUSDynFrmAlias<FADD_S, "fadd.s">; 305 def : PatFpr32Fpr32DynFrm<fadd, FADD_S>;
|
/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoF.td | 132 def FADD_S : FPALUS_rr_frm<0b0000000, "fadd.s">, 134 def : FPALUSDynFrmAlias<FADD_S, "fadd.s">; 311 def : PatFpr32Fpr32DynFrm<fadd, FADD_S>;
|
/external/llvm/lib/Target/Mips/ |
D | MipsInstrFPU.td | 468 def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, II_ADD_S, 1, fadd>,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsScheduleP5600.td | 451 (instrs FADD_D32, FADD_D64, FADD_S, FMUL_D32, FMUL_D64, FMUL_S,
|
D | MipsInstrFPU.td | 633 def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, II_ADD_S, 1, fadd>,
|
D | MipsScheduleGeneric.td | 811 FADD_D64, FADD_S, MADD_S, MSUB_S, FMUL_S,
|
/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsScheduleP5600.td | 452 (instrs FADD_D32, FADD_D64, FADD_PS64, FADD_S, FMUL_D32, FMUL_D64,
|
D | MipsInstrFPU.td | 666 def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, II_ADD_S, 1, fadd>,
|
D | MipsScheduleGeneric.td | 811 FADD_D64, FADD_S, MADD_S, MSUB_S, FMUL_S,
|
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
D | MipsGenSubtargetInfo.inc | 884 {DBGFIELD("FADD_S") 1, false, false, 14, 2, 4, 1, 0, 0}, // #624 2568 {DBGFIELD("FADD_S") 1, false, false, 57, 2, 4, 1, 0, 0}, // #624
|
D | MipsGenMCCodeEmitter.inc | 1480 UINT64_C(1174405120), // FADD_S 3511 case Mips::FADD_S: 10942 CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FADD_S = 1467
|
D | MipsGenAsmWriter.inc | 2708 268458825U, // FADD_S 5462 0U, // FADD_S
|
D | MipsGenInstrInfo.inc | 1482 FADD_S = 1467, 3404 FADD_S = 624, 6328 …MCID::Commutable), 0x4ULL, nullptr, nullptr, OperandInfo241, -1 ,nullptr }, // Inst #1467 = FADD_S 16786 { Mips::FADD_S, Mips::FADD_S, Mips::FADD_S_MM },
|
D | MipsGenFastISel.inc | 1457 return fastEmitInst_rr(Mips::FADD_S, &Mips::FGR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
|
D | MipsGenDisassemblerTables.inc | 3360 /* 2622 */ MCD::OPC_Decode, 187, 11, 207, 1, // Opcode: FADD_S
|
D | MipsGenAsmMatcher.inc | 5457 …{ 55 /* add.s */, Mips::FADD_S, Convert__FGR32AsmReg1_0__FGR32AsmReg1_1__FGR32AsmReg1_2, AMFBS_Has…
|
D | MipsGenGlobalISel.inc | 21571 …// (fadd:{ *:[f32] } FGR32Opnd:{ *:[f32] }:$fs, FGR32Opnd:{ *:[f32] }:$ft) => (FADD_S:{ *:[f32] … 21572 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::FADD_S,
|
D | MipsGenDAGISel.inc | 27348 /* 51727*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::FADD_S), 0, 27351 … // Dst: (FADD_S:{ *:[f32] } FGR32Opnd:{ *:[f32] }:$fs, FGR32Opnd:{ *:[f32] }:$ft)
|
/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 703 134240572U, // FADD_S 2492 0U, // FADD_S
|
D | MipsGenDisassemblerTables.inc | 1040 /* 1805 */ MCD_OPC_Decode, 174, 5, 93, // Opcode: FADD_S
|