Searched refs:FCOM (Results 1 – 13 of 13) sorted by relevance
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ScheduleZnver2.td | 936 // FCOM(P) FUCOM(P). 940 def : InstRW<[Zn2WriteFPU0Lat1Ld], (instregex "FCOM(P?)(32|64)m")>;
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D | X86ScheduleZnver1.td | 936 // FCOM(P) FUCOM(P). 940 def : InstRW<[ZnWriteFPU0Lat1Ld], (instregex "FCOM(P?)(32|64)m")>;
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D | X86SchedBroadwell.td | 1061 def: InstRW<[BWWriteResGroup74], (instregex "FCOM(P?)(32|64)m")>;
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D | X86SchedSkylakeClient.td | 1218 def: InstRW<[SKLWriteResGroup108], (instregex "FCOM(P?)(32|64)m")>;
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D | X86SchedSkylakeServer.td | 1518 def: InstRW<[SKXWriteResGroup119], (instregex "FCOM(P?)(32|64)m",
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86ScheduleZnver2.td | 948 // FCOM(P) FUCOM(P). 952 def : InstRW<[Zn2WriteFPU0Lat1Ld], (instregex "FCOM(P?)(32|64)m")>;
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D | X86ScheduleZnver1.td | 939 // FCOM(P) FUCOM(P). 943 def : InstRW<[ZnWriteFPU0Lat1Ld], (instregex "FCOM(P?)(32|64)m")>;
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D | X86SchedBroadwell.td | 1064 def: InstRW<[BWWriteResGroup74], (instregex "FCOM(P?)(32|64)m")>;
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D | X86SchedSkylakeClient.td | 1221 def: InstRW<[SKLWriteResGroup108], (instregex "FCOM(P?)(32|64)m")>;
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D | X86SchedSkylakeServer.td | 1529 def: InstRW<[SKXWriteResGroup119], (instregex "FCOM(P?)(32|64)m",
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/external/capstone/ |
D | ChangeLog | 409 - Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP,
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/external/llvm/lib/Target/X86/ |
D | X86SchedHaswell.td | 1195 // FCOM(P) FUCOM(P). 1200 def : InstRW<[WriteP1_P23], (instregex "FCOM(32|64)m", "FCOMP(32|64)m")>;
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 700 #define FCOM(a) CHOICE(fcom a, fcom a, fcom a) macro 1413 #define FCOM(a) fcom a macro
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