| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 254 FCOPYSIGN, enumerator
|
| D | BasicTTIImpl.h | 779 ISDs.push_back(ISD::FCOPYSIGN); in getIntrinsicInstrCost()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 366 FCOPYSIGN, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 470 FCOPYSIGN, enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break; in SoftenFloatResult()
802 case ISD::FCOPYSIGN: in CanSkipSoftenFloatOperand()
817 case ISD::FCOPYSIGN: in CanSkipSoftenFloatOperand()
1021 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult()
1507 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; in ExpandFloatOperand()
1589 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), in ExpandFloatOp_FCOPYSIGN()
1746 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; in PromoteFloatOperand()
1866 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; in PromoteFloatResult()
|
| D | LegalizeVectorTypes.cpp | 107 case ISD::FCOPYSIGN: in ScalarizeVectorResult()
601 case ISD::FCOPYSIGN: SplitVecRes_FCOPYSIGN(N, Lo, Hi); break; in SplitVectorResult()
924 Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLo.getValueType(), LHSLo, RHSLo); in SplitVecRes_FCOPYSIGN()
925 Hi = DAG.getNode(ISD::FCOPYSIGN, DL, LHSHi.getValueType(), LHSHi, RHSHi); in SplitVecRes_FCOPYSIGN()
1468 case ISD::FCOPYSIGN: Res = SplitVecOp_FCOPYSIGN(N); break; in SplitVectorOperand()
2115 case ISD::FCOPYSIGN: in WidenVectorResult()
3088 case ISD::FCOPYSIGN: Res = WidenVecOp_FCOPYSIGN(N); break; in WidenVectorOperand()
|
| D | SelectionDAGDumper.cpp | 203 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
|
| D | LegalizeDAG.cpp | 1499 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS()
1501 return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero); in ExpandFABS()
3115 case ISD::FCOPYSIGN: in ExpandNode()
4205 case ISD::FCOPYSIGN: in PromoteNode()
4216 const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN); in PromoteNode()
|
| D | LegalizeVectorOps.cpp | 307 case ISD::FCOPYSIGN: in LegalizeOp()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 77 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break; in SoftenFloatResult()
835 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break; in SoftenFloatOperand()
1066 return DAG.getNode(ISD::FCOPYSIGN, dl, LVT, LHS, RHS); in SoftenFloatOp_FCOPYSIGN()
1177 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult()
1749 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; in ExpandFloatOperand()
1848 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), in ExpandFloatOp_FCOPYSIGN()
2077 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; in PromoteFloatOperand()
2209 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; in PromoteFloatResult()
2571 case ISD::FCOPYSIGN: R = SoftPromoteHalfRes_FCOPYSIGN(N); break; in SoftPromoteHalfResult()
2863 case ISD::FCOPYSIGN: Res = SoftPromoteHalfOp_FCOPYSIGN(N, OpNo); break; in SoftPromoteHalfOperand()
|
| D | LegalizeVectorTypes.cpp | 114 case ISD::FCOPYSIGN: in ScalarizeVectorResult()
892 case ISD::FCOPYSIGN: SplitVecRes_FCOPYSIGN(N, Lo, Hi); break; in SplitVectorResult()
1303 Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLo.getValueType(), LHSLo, RHSLo); in SplitVecRes_FCOPYSIGN()
1304 Hi = DAG.getNode(ISD::FCOPYSIGN, DL, LHSHi.getValueType(), LHSHi, RHSHi); in SplitVecRes_FCOPYSIGN()
2072 case ISD::FCOPYSIGN: Res = SplitVecOp_FCOPYSIGN(N); break; in SplitVectorOperand()
2935 case ISD::FCOPYSIGN: in WidenVectorResult()
4365 case ISD::FCOPYSIGN: Res = WidenVecOp_FCOPYSIGN(N); break; in WidenVectorOperand()
|
| D | SelectionDAGDumper.cpp | 265 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
|
| D | LegalizeDAG.cpp | 1618 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS()
1620 return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero); in ExpandFABS()
3292 case ISD::FCOPYSIGN: in ExpandNode()
4710 case ISD::FCOPYSIGN: in PromoteNode()
4721 const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN); in PromoteNode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 77 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break; in SoftenFloatResult()
797 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break; in SoftenFloatOperand()
1028 return DAG.getNode(ISD::FCOPYSIGN, dl, LVT, LHS, RHS); in SoftenFloatOp_FCOPYSIGN()
1139 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult()
1659 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; in ExpandFloatOperand()
1748 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), in ExpandFloatOp_FCOPYSIGN()
1971 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; in PromoteFloatOperand()
2103 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; in PromoteFloatResult()
|
| D | SelectionDAGDumper.cpp | 261 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
|
| D | LegalizeVectorTypes.cpp | 111 case ISD::FCOPYSIGN: in ScalarizeVectorResult()
836 case ISD::FCOPYSIGN: SplitVecRes_FCOPYSIGN(N, Lo, Hi); break; in SplitVectorResult()
1199 Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLo.getValueType(), LHSLo, RHSLo); in SplitVecRes_FCOPYSIGN()
1200 Hi = DAG.getNode(ISD::FCOPYSIGN, DL, LHSHi.getValueType(), LHSHi, RHSHi); in SplitVecRes_FCOPYSIGN()
1935 case ISD::FCOPYSIGN: Res = SplitVecOp_FCOPYSIGN(N); break; in SplitVectorOperand()
2771 case ISD::FCOPYSIGN: in WidenVectorResult()
4201 case ISD::FCOPYSIGN: Res = WidenVecOp_FCOPYSIGN(N); break; in WidenVectorOperand()
|
| D | LegalizeDAG.cpp | 1569 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS()
1571 return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero); in ExpandFABS()
3153 case ISD::FCOPYSIGN: in ExpandNode()
4485 case ISD::FCOPYSIGN: in PromoteNode()
4496 const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN); in PromoteNode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | TargetOpcodes.def | 508 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This does
510 /// floating point. X and the result must have the same type. FCOPYSIGN(f32,
|
| /external/llvm-project/llvm/include/llvm/Support/ |
| D | TargetOpcodes.def | 581 /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This does
583 /// floating point. X and the result must have the same type. FCOPYSIGN(f32,
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 285 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in AMDGPUTargetLowering()
286 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in AMDGPUTargetLowering()
430 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in AMDGPUTargetLowering()
1700 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src); in LowerFRINT()
1743 SDValue SignOne = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f32, One, X); in LowerFROUND32()
1804 SDValue S = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, Mag, X); in LowerFROUND64()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 564 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Expand); in NVPTXTargetLowering()
565 setOperationAction(ISD::FCOPYSIGN, MVT::v2f16, Expand); in NVPTXTargetLowering()
566 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in NVPTXTargetLowering()
567 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in NVPTXTargetLowering()
2160 RoundedA = DAG.getNode(ISD::FCOPYSIGN, SL, VT, RoundedA, A); in LowerFROUND64()
|
| /external/llvm-project/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 548 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Expand); in NVPTXTargetLowering()
549 setOperationAction(ISD::FCOPYSIGN, MVT::v2f16, Expand); in NVPTXTargetLowering()
550 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in NVPTXTargetLowering()
551 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in NVPTXTargetLowering()
2143 RoundedA = DAG.getNode(ISD::FCOPYSIGN, SL, VT, RoundedA, A); in LowerFROUND64()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 145 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in AArch64TargetLowering()
258 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in AArch64TargetLowering()
259 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in AArch64TargetLowering()
275 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote); in AArch64TargetLowering()
317 setOperationAction(ISD::FCOPYSIGN, MVT::v4f16, Expand); in AArch64TargetLowering()
347 setOperationAction(ISD::FCOPYSIGN, MVT::v8f16, Expand); in AArch64TargetLowering()
526 setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand); in AArch64TargetLowering()
662 setOperationAction(ISD::FCOPYSIGN, VT, Custom); in addTypeForNEON()
2386 case ISD::FCOPYSIGN: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 235 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in R600TargetLowering()
236 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in R600TargetLowering()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 235 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in R600TargetLowering()
236 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in R600TargetLowering()
|