| /external/llvm-project/llvm/lib/DebugInfo/CodeView/ |
| D | StringsAndChecksums.cpp | 72 const DebugSubsectionRecord &FCR) { in initializeChecksums() argument
73 assert(FCR.kind() == DebugSubsectionKind::FileChecksums); in initializeChecksums()
78 consumeError(OwnedChecksums->initialize(FCR.getRecordData())); in initializeChecksums()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/ |
| D | StringsAndChecksums.cpp | 72 const DebugSubsectionRecord &FCR) { in initializeChecksums() argument
73 assert(FCR.kind() == DebugSubsectionKind::FileChecksums); in initializeChecksums()
78 consumeError(OwnedChecksums->initialize(FCR.getRecordData())); in initializeChecksums()
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| /external/fec/ |
| D | decode_rs.h | 54 #if !defined(FCR)
90 s[i] = data[j] ^ ALPHA_TO[MODNN(INDEX_OF[s[i]] + (FCR+i)*PRIM)];
272 num2 = ALPHA_TO[MODNN(root[j] * (FCR - 1) + NN)];
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| D | fixed.h | 29 #define FCR 112 macro
|
| D | char.h | 16 #define FCR (rs->fcr) macro
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| D | int.h | 16 #define FCR (rs->fcr) macro
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| D | decode_rs.c | 54 s[i] = data[j] ^ ALPHA_TO[MODNN(INDEX_OF[s[i]] + (FCR+i)*PRIM)];
236 num2 = ALPHA_TO[MODNN(root[j] * (FCR - 1) + NN)];
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| /external/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
| D | StringsAndChecksums.h | 72 void initializeChecksums(const DebugSubsectionRecord &FCR);
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | StringsAndChecksums.h | 72 void initializeChecksums(const DebugSubsectionRecord &FCR);
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.td | 198 def FCR#I : MipsReg<#I, ""#I>;
392 def CCR : RegisterClass<"Mips", [i32], 32, (sequence "FCR%u", 0, 31)>,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.td | 197 def FCR#I : MipsReg<#I, ""#I>;
421 def CCR : RegisterClass<"Mips", [i32], 32, (sequence "FCR%u", 0, 31)>,
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.td | 197 def FCR#I : MipsReg<I, ""#I>;
421 def CCR : RegisterClass<"Mips", [i32], 32, (sequence "FCR%u", 0, 31)>,
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l476xx.h | 604 __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ member
685 …__IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset… member
|
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l4a6xx.h | 673 __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ member
756 …__IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset… member
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| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 3319 ,"PT","FCR","Figueira de Castelo Rodrigo","Figueira de Castelo Rodrigo","09","--3-----","RN","0401"…
14864 ,"US","FCR","Fancher","Fancher","NY","--3-----","RQ","9008",,,
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| D | 2013-1_UNLOCODE_CodeListPart1.csv | 35809 ,"FR","FCR","Foucherans","Foucherans","39","-----6--","RQ","0907",,,
|
| /external/one-true-awk/testdir/ |
| D | funstack.in | 23733 @Article{Brice:1978:FCR,
|