| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 353 X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
354 X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
1080 X86_INTRINSIC_DATA(sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0),
1081 X86_INTRINSIC_DATA(sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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| D | X86ISelLowering.h | 231 FHADD, enumerator
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| D | X86InstrFragmentsSIMD.td | 58 def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
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| D | X86ISelLowering.cpp | 9241 case ISD::FADD: HOpcode = X86ISD::FHADD; break; in isHopBuildVector()
9425 X86Opcode = X86ISD::FHADD; in LowerToHorizontalOp()
18992 Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub); in LowerUINT_TO_FP_i64()
20368 case ISD::FADD: HOpcode = X86ISD::FHADD; break; in lowerAddSubToHorizontalOp()
20376 (HOpcode == X86ISD::HADD || HOpcode == X86ISD::FHADD)) in lowerAddSubToHorizontalOp()
29653 case X86ISD::FHADD: return "X86ISD::FHADD"; in getTargetNodeName()
34541 (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD || in combineTargetShuffle()
35130 if (HOp.getOpcode() != X86ISD::HADD && HOp.getOpcode() != X86ISD::FHADD && in foldShuffleOfHorizOp()
35543 case X86ISD::FHADD: in SimplifyDemandedVectorEltsForTargetNode()
35728 case X86ISD::FHADD: in SimplifyDemandedVectorEltsForTargetNode()
[all …]
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 353 X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
354 X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
1086 X86_INTRINSIC_DATA(sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0),
1087 X86_INTRINSIC_DATA(sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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| D | X86ISelLowering.h | 255 FHADD, enumerator
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| D | X86InstrFragmentsSIMD.td | 58 def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
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| D | X86ISelLowering.cpp | 9514 case ISD::FADD: HOpcode = X86ISD::FHADD; break; in isHopBuildVector()
9698 X86Opcode = X86ISD::FHADD; in LowerToHorizontalOp()
10866 case X86ISD::FHADD: in IsElementEquivalent()
19965 Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub); in LowerUINT_TO_FP_i64()
21487 case ISD::FADD: HOpcode = X86ISD::FHADD; break; in lowerAddSubToHorizontalOp()
21495 (HOpcode == X86ISD::HADD || HOpcode == X86ISD::FHADD)) in lowerAddSubToHorizontalOp()
30798 NODE_NAME_CASE(FHADD) in getTargetNodeName()
35886 bool isHoriz = (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD || in canonicalizeShuffleMaskWithHorizOp()
37471 if (HOp.getOpcode() != X86ISD::HADD && HOp.getOpcode() != X86ISD::FHADD && in foldShuffleOfHorizOp()
37890 case X86ISD::FHADD: in SimplifyDemandedVectorEltsForTargetNode()
[all …]
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 234 FHADD, enumerator
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| D | X86IntrinsicsInfo.h | 253 X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
254 X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
1930 X86_INTRINSIC_DATA(sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0),
1931 X86_INTRINSIC_DATA(sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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| D | X86InstrFragmentsSIMD.td | 65 def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
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| D | X86ISelLowering.cpp | 6396 return DAG.getNode(X86ISD::FHADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp()
6420 return DAG.getNode(X86ISD::FHADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp()
6474 X86Opcode = X86ISD::FHADD; in LowerToHorizontalOp()
13505 Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub); in LowerUINT_TO_FP_i64()
22133 case X86ISD::FHADD: return "X86ISD::FHADD"; in getTargetNodeName()
29565 auto NewOpcode = IsFadd ? X86ISD::FHADD : X86ISD::FHSUB; in combineFaddFsub()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenFastISel.inc | 11270 // FastEmit functions for X86ISD::FHADD.
15160 case X86ISD::FHADD: return fastEmit_X86ISD_FHADD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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