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Searched refs:FIQ_BYP_DIS_GRP0 (Results 1 – 3 of 3) sorted by relevance

/external/arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/
Dzynqmp_helpers.S37 orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0)
/external/arm-trusted-firmware/drivers/arm/gic/v2/
Dgicv2_main.c45 val = CTLR_ENABLE_G0_BIT | FIQ_EN_BIT | FIQ_BYP_DIS_GRP0; in gicv2_cpuif_enable()
67 val |= FIQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP0; in gicv2_cpuif_disable()
/external/arm-trusted-firmware/include/drivers/arm/
Dgicv2.h76 #define FIQ_BYP_DIS_GRP0 BIT_32(5) macro