| /external/llvm-project/llvm/lib/DebugInfo/CodeView/ |
| D | ContinuationRecordBuilder.cpp | 61 const SegmentInjection *FLI = in begin() local
65 const uint8_t *FLIB = reinterpret_cast<const uint8_t *>(FLI); in begin()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/ |
| D | ContinuationRecordBuilder.cpp | 61 const SegmentInjection *FLI = in begin() local
65 const uint8_t *FLIB = reinterpret_cast<const uint8_t *>(FLI); in begin()
|
| /external/llvm-project/llvm/tools/llvm-opt-report/ |
| D | OptReport.cpp | 283 for (auto &FLI : FileInfo) in writeReport() local
284 for (auto &FI : FLI.second) in writeReport()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | InterleavedLoadCombinePass.cpp | 1107 BasicBlock::iterator FLI = in findFirstLoad() local
1111 assert(FLI != BB->end()); in findFirstLoad()
1113 return cast<LoadInst>(FLI); in findFirstLoad()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | InterleavedLoadCombinePass.cpp | 1107 BasicBlock::iterator FLI = in findFirstLoad() local
1111 assert(FLI != BB->end()); in findFirstLoad()
1113 return cast<LoadInst>(FLI); in findFirstLoad()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 334 auto FLI = LoadBrevMap.find(IntNo); in SelectBrevLdIntrinsic() local
335 if (FLI != LoadBrevMap.end()) { in SelectBrevLdIntrinsic()
343 FLI->second, dl, RTys, in SelectBrevLdIntrinsic()
382 auto FLI = LoadNPcMap.find (IntNo); in SelectNewCircIntrinsic() local
383 if (FLI != LoadNPcMap.end()) { in SelectNewCircIntrinsic()
401 MachineSDNode *Res = CurDAG->getMachineNode(FLI->second, DL, RTys, Ops); in SelectNewCircIntrinsic()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 334 auto FLI = LoadBrevMap.find(IntNo); in SelectBrevLdIntrinsic() local
335 if (FLI != LoadBrevMap.end()) { in SelectBrevLdIntrinsic()
343 FLI->second, dl, RTys, in SelectBrevLdIntrinsic()
382 auto FLI = LoadNPcMap.find (IntNo); in SelectNewCircIntrinsic() local
383 if (FLI != LoadNPcMap.end()) { in SelectNewCircIntrinsic()
401 MachineSDNode *Res = CurDAG->getMachineNode(FLI->second, DL, RTys, Ops); in SelectNewCircIntrinsic()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.h | 392 FunctionLoweringInfo *FLI, LegacyDivergenceAnalysis *DA) const override;
|
| D | SIISelLowering.cpp | 10876 FunctionLoweringInfo * FLI, LegacyDivergenceAnalysis * KDA) const in isSDNodeSourceOfDivergence() argument
10882 const MachineFunction * MF = FLI->MF; in isSDNodeSourceOfDivergence()
10897 else if (!AMDGPU::isEntryFunctionCC(FLI->Fn->getCallingConv())) in isSDNodeSourceOfDivergence()
10901 const Value *V = FLI->getValueFromVirtualReg(Reg); in isSDNodeSourceOfDivergence()
10904 assert(Reg == FLI->DemoteRegister || isCopyFromRegOfInlineAsm(N)); in isSDNodeSourceOfDivergence()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.h | 433 FunctionLoweringInfo *FLI, LegacyDivergenceAnalysis *DA) const override;
|
| D | SIISelLowering.cpp | 11750 const SDNode *N, FunctionLoweringInfo *FLI, in isSDNodeSourceOfDivergence() argument
11755 const MachineRegisterInfo &MRI = FLI->MF->getRegInfo(); in isSDNodeSourceOfDivergence()
11763 if (const Value *V = FLI->getValueFromVirtualReg(R->getReg())) in isSDNodeSourceOfDivergence()
11766 assert(Reg == FLI->DemoteRegister || isCopyFromRegOfInlineAsm(N)); in isSDNodeSourceOfDivergence()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 234 FunctionLoweringInfo * FLI = nullptr;
413 FLI = FuncInfo;
|
| D | TargetLowering.h | 2966 FunctionLoweringInfo *FLI, in isSDNodeSourceOfDivergence() argument
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 234 FunctionLoweringInfo * FLI = nullptr;
437 FLI = FuncInfo;
|
| D | TargetLowering.h | 3146 FunctionLoweringInfo *FLI, in isSDNodeSourceOfDivergence() argument
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 1047 llvm::shouldOptimizeForSize(FLI->MBB->getBasicBlock(), PSI, BFI); in shouldOptForSize()
1799 N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA); in getRegister()
8541 bool IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA); in updateDivergence()
8584 bool IsSDNodeDivergent = TLI.isSDNodeSourceOfDivergence(N, FLI, DA); in VerifyDAGDiverence()
9724 IsDivergent |= TLI->isSDNodeSourceOfDivergence(Node, FLI, DA); in createOperands()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 1098 llvm::shouldOptimizeForSize(FLI->MBB->getBasicBlock(), PSI, BFI); in shouldOptForSize()
1864 N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA); in getRegister()
8747 assert(!TLI->isSDNodeSourceOfDivergence(N, FLI, DA) && in calculateDivergence()
8751 if (TLI->isSDNodeSourceOfDivergence(N, FLI, DA)) in calculateDivergence()
10039 IsDivergent |= TLI->isSDNodeSourceOfDivergence(Node, FLI, DA); in createOperands()
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart2.csv | 1935 ,"GB","FLI","Flint","Flint","CWD","--3-----","AF","9511",,,
7138 ,"HT","FLI","Fort Liberte","Fort Liberte",,"1-------","QQ","8103",,,
10488 ,"IS","FLA","Flateyri","Flateyri",,"1-------","AC","9601","FLI",,
10489 ,"IS","FLI","Flateyri Apt","Flateyri Apt",,"---4----","AC","9601",,,
12346 ,"IT","FLI","Foligno","Foligno","PG","-23-----","RL","0901",,"4257N 01242E",
|
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 5885 ,"SE","FLI","Flivik","Flivik","H","1-------","RL","1007",,"5733N 01635E",
15326 ,"US","FLI","Franklin Park","Franklin Park","IL","--3-----","RQ","9307",,,
|
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 11551 ,"CH","FLI","Fleurier","Fleurier","NE","-----6--","RL","0601",,"4654N 00635E",
19543 ,"DE","FLI","Flintsbach","Flintsbach","BY","--3-----","RL","1107",,"4743N 01208E",
36806 ,"FR","FLI","La Faloise","La Faloise","80","--3-----","RL","0501",,"4942N 00221E",
|